[PATCH] D23560: [RISCV 3/10] Add stub backend

[Alex Bradbury via llvm-commits]

asb added inline comments.

================
Comment at: CMakeLists.txt:276
@@ -275,2 +275,3 @@
   PowerPC
+  RISCV
   Sparc
----------------
theraven wrote:
> Not really an objection, but MIPS and SPARC are both capitalised as if they were words.  It would be more consistent to call the back end RiscV, though this would be ugly.
Yes, after considering the alternatives I decided RISCV would be least ugly. Plus ARM of course goes for all caps too.

================
Comment at: docs/CompilerWriterInfo.rst:86
@@ +85,3 @@
+------
+* `RISC-V User-Level ISA Specification <https://riscv.org/specifications/>`_
+
----------------
theraven wrote:
> Please also add a link to the ABI spec here.
What exists of the ABI spec is contained within the user-level ISA specification (chapter 20). The separate ABI doc was an extract from the user-level ISA that was put out because the ABI supported by the tools was changed in-between ISA releases. The v2.1 spec contains the most up to date and complete ABI specification.


https://reviews.llvm.org/D23560