[llvm] r279760 - GlobalISel: mark simple ops legal even on types < 32-bit.
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 25 10:37:39 PDT 2016
Author: tnorthover
Date: Thu Aug 25 12:37:39 2016
New Revision: 279760
URL: http://llvm.org/viewvc/llvm-project?rev=279760&view=rev
Log:
GlobalISel: mark simple ops legal even on types < 32-bit.
The 32-bit variants of these operations don't depend on the bits not being
operated on, so they also naturally model operations narrower than the actual
register width.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
Modified: llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp?rev=279760&r1=279759&r2=279760&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp Thu Aug 25 12:37:39 2016
@@ -37,11 +37,10 @@ AArch64MachineLegalizer::AArch64MachineL
const LLT v2s64 = LLT::vector(2, 64);
for (auto BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR}) {
- for (auto Ty : {s32, s64, v2s32, v4s32, v2s64})
+ // These operations naturally get the right answer when used on
+ // GPR32, even if the actual type is narrower.
+ for (auto Ty : {s1, s8, s16, s32, s64, v2s32, v4s32, v2s64})
setAction({BinOp, Ty}, Legal);
-
- for (auto Ty : {s8, s16})
- setAction({BinOp, Ty}, WidenScalar);
}
for (auto BinOp : {G_SHL, G_LSHR, G_ASHR, G_SDIV, G_UDIV})
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir?rev=279760&r1=279759&r2=279760&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir Thu Aug 25 12:37:39 2016
@@ -51,10 +51,7 @@ body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
; CHECK-LABEL: name: test_scalar_add_small
- ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXT { s32, s8 } %0
- ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXT { s32, s8 } %1
- ; CHECK: [[RES:%.*]](32) = G_ADD s32 [[LHS]], [[RHS]]
- ; CHECK: %2(8) = G_TRUNC { s8, s32 } [[RES]]
+ ; CHECK: [[RES:%.*]](8) = G_ADD s8 %0, %1
%0(8) = G_TRUNC { s8, s64 } %x0
%1(8) = G_TRUNC { s8, s64 } %x1
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir?rev=279760&r1=279759&r2=279760&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir Thu Aug 25 12:37:39 2016
@@ -19,10 +19,7 @@ body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
; CHECK-LABEL: name: test_scalar_and_small
- ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXT { s32, s8 } %0
- ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXT { s32, s8 } %1
- ; CHECK: [[RES:%.*]](32) = G_AND s32 [[LHS]], [[RHS]]
- ; CHECK: %2(8) = G_TRUNC { s8, s32 } [[RES]]
+ ; CHECK: [[RES:%.*]](8) = G_AND s8 %0, %1
%0(8) = G_TRUNC { s8, s32 } %x0
%1(8) = G_TRUNC { s8, s32 } %x1
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir?rev=279760&r1=279759&r2=279760&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir Thu Aug 25 12:37:39 2016
@@ -19,10 +19,7 @@ body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
; CHECK-LABEL: name: test_scalar_mul_small
- ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXT { s32, s8 } %0
- ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXT { s32, s8 } %1
- ; CHECK: [[RES:%.*]](32) = G_MUL s32 [[LHS]], [[RHS]]
- ; CHECK: %2(8) = G_TRUNC { s8, s32 } [[RES]]
+ ; CHECK: [[RES:%.*]](8) = G_MUL s8 %0, %1
%0(8) = G_TRUNC { s8, s64 } %x0
%1(8) = G_TRUNC { s8, s64 } %x1
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir?rev=279760&r1=279759&r2=279760&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir Thu Aug 25 12:37:39 2016
@@ -19,10 +19,7 @@ body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
; CHECK-LABEL: name: test_scalar_or_small
- ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXT { s32, s8 } %0
- ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXT { s32, s8 } %1
- ; CHECK: [[RES:%.*]](32) = G_OR s32 [[LHS]], [[RHS]]
- ; CHECK: %2(8) = G_TRUNC { s8, s32 } [[RES]]
+ ; CHECK: %2(8) = G_OR s8 %0, %1
%0(8) = G_TRUNC { s8, s64 } %x0
%1(8) = G_TRUNC { s8, s64 } %x1
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir?rev=279760&r1=279759&r2=279760&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir Thu Aug 25 12:37:39 2016
@@ -19,10 +19,7 @@ body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
; CHECK-LABEL: name: test_scalar_sub_small
- ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXT { s32, s8 } %0
- ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXT { s32, s8 } %1
- ; CHECK: [[RES:%.*]](32) = G_SUB s32 [[LHS]], [[RHS]]
- ; CHECK: %2(8) = G_TRUNC { s8, s32 } [[RES]]
+ ; CHECK: [[RES:%.*]](8) = G_SUB s8 %0, %1
%0(8) = G_TRUNC { s8, s64 } %x0
%1(8) = G_TRUNC { s8, s64 } %x1
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir?rev=279760&r1=279759&r2=279760&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir Thu Aug 25 12:37:39 2016
@@ -19,10 +19,7 @@ body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
; CHECK-LABEL: name: test_scalar_xor_small
- ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXT { s32, s8 } %0
- ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXT { s32, s8 } %1
- ; CHECK: [[RES:%.*]](32) = G_XOR s32 [[LHS]], [[RHS]]
- ; CHECK: %2(8) = G_TRUNC { s8, s32 } [[RES]]
+ ; CHECK: %2(8) = G_XOR s8 %0, %1
%0(8) = G_TRUNC { s8, s64 } %x0
%1(8) = G_TRUNC { s8, s64 } %x1
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