[llvm] r279758 - GlobalISel: perform multi-step legalization
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 25 10:37:32 PDT 2016
Author: tnorthover
Date: Thu Aug 25 12:37:32 2016
New Revision: 279758
URL: http://llvm.org/viewvc/llvm-project?rev=279758&view=rev
Log:
GlobalISel: perform multi-step legalization
Modified:
llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h
llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h?rev=279758&r1=279757&r2=279758&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h Thu Aug 25 12:37:32 2016
@@ -21,6 +21,8 @@
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/IR/DebugLoc.h"
+#include <queue>
+
namespace llvm {
// Forward declarations.
@@ -47,6 +49,8 @@ class MachineIRBuilder {
bool Before;
/// @}
+ std::function<void(MachineInstr *)> InsertedInstr;
+
const TargetInstrInfo &getTII() {
assert(TII && "TargetInstrInfo is not set");
return *TII;
@@ -86,6 +90,13 @@ public:
void setInstr(MachineInstr &MI, bool Before = true);
/// @}
+ /// Control where instructions we create are recorded (typically for
+ /// visiting again later during legalization).
+ /// @{
+ void recordInsertions(std::function<void(MachineInstr *)> InsertedInstr);
+ void stopRecordingInsertions();
+ /// @}
+
/// Set the debug location to \p DL for all the next build instructions.
void setDebugLoc(const DebugLoc &DL) { this->DL = DL; }
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h?rev=279758&r1=279757&r2=279758&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h Thu Aug 25 12:37:32 2016
@@ -55,6 +55,9 @@ public:
///
/// Considered as an opaque blob, the legal code will use and define the same
/// registers as \p MI.
+ LegalizeResult legalizeInstrStep(MachineInstr &MI,
+ const MachineLegalizer &Legalizer);
+
LegalizeResult legalizeInstr(MachineInstr &MI,
const MachineLegalizer &Legalizer);
Modified: llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp?rev=279758&r1=279757&r2=279758&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp Thu Aug 25 12:37:32 2016
@@ -26,6 +26,7 @@ void MachineIRBuilder::setMF(MachineFunc
this->TII = MF.getSubtarget().getInstrInfo();
this->DL = DebugLoc();
this->MI = nullptr;
+ this->InsertedInstr = nullptr;
}
void MachineIRBuilder::setMBB(MachineBasicBlock &MBB, bool Beginning) {
@@ -53,6 +54,15 @@ MachineBasicBlock::iterator MachineIRBui
return Before ? getMBB().begin() : getMBB().end();
}
+void MachineIRBuilder::recordInsertions(
+ std::function<void(MachineInstr *)> Inserted) {
+ InsertedInstr = Inserted;
+}
+
+void MachineIRBuilder::stopRecordingInsertions() {
+ InsertedInstr = nullptr;
+}
+
//------------------------------------------------------------------------------
// Build instruction variants.
//------------------------------------------------------------------------------
@@ -69,6 +79,8 @@ MachineInstrBuilder MachineIRBuilder::bu
assert(!isPreISelGenericOpcode(Opcode) &&
"Generic instruction must have a type");
getMBB().insert(getInsertPt(), MIB);
+ if (InsertedInstr)
+ InsertedInstr(MIB);
return MIB;
}
@@ -181,6 +193,8 @@ MachineInstrBuilder MachineIRBuilder::bu
MIB.addImm(Idx);
getMBB().insert(getInsertPt(), MIB);
+ if (InsertedInstr)
+ InsertedInstr(MIB);
return MIB;
}
Modified: llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp?rev=279758&r1=279757&r2=279758&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp Thu Aug 25 12:37:32 2016
@@ -31,8 +31,9 @@ MachineLegalizeHelper::MachineLegalizeHe
MIRBuilder.setMF(MF);
}
-MachineLegalizeHelper::LegalizeResult MachineLegalizeHelper::legalizeInstr(
- MachineInstr &MI, const MachineLegalizer &Legalizer) {
+MachineLegalizeHelper::LegalizeResult
+MachineLegalizeHelper::legalizeInstrStep(MachineInstr &MI,
+ const MachineLegalizer &Legalizer) {
auto Action = Legalizer.getAction(MI);
switch (std::get<0>(Action)) {
case MachineLegalizer::Legal:
@@ -48,6 +49,30 @@ MachineLegalizeHelper::LegalizeResult Ma
}
}
+MachineLegalizeHelper::LegalizeResult
+MachineLegalizeHelper::legalizeInstr(MachineInstr &MI,
+ const MachineLegalizer &Legalizer) {
+ std::queue<MachineInstr *> WorkList;
+ MIRBuilder.recordInsertions([&](MachineInstr *MI) { WorkList.push(MI); });
+ WorkList.push(&MI);
+
+ bool Changed = false;
+ LegalizeResult Res;
+ do {
+ Res = legalizeInstrStep(*WorkList.front(), Legalizer);
+ if (Res == UnableToLegalize) {
+ MIRBuilder.stopRecordingInsertions();
+ return UnableToLegalize;
+ }
+ Changed |= Res == Legalized;
+ WorkList.pop();
+ } while (!WorkList.empty());
+
+ MIRBuilder.stopRecordingInsertions();
+
+ return Changed ? Legalized : AlreadyLegal;
+}
+
void MachineLegalizeHelper::extractParts(unsigned Reg, LLT Ty, int NumParts,
SmallVectorImpl<unsigned> &VRegs) {
unsigned Size = Ty.getSizeInBits();
Modified: llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp?rev=279758&r1=279757&r2=279758&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp Thu Aug 25 12:37:32 2016
@@ -48,6 +48,10 @@ AArch64MachineLegalizer::AArch64MachineL
for (auto Ty : {s32, s64})
setAction({BinOp, Ty}, Legal);
+ for (auto Op : { G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_SMULO, G_UMULO })
+ for (auto Ty : { s32, s64 })
+ setAction({Op, Ty}, Legal);
+
for (auto BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
for (auto Ty : {s32, s64})
setAction({BinOp, Ty}, Legal);
@@ -99,6 +103,20 @@ AArch64MachineLegalizer::AArch64MachineL
setAction({G_ANYEXT, 1, Ty}, Legal);
}
+ // Truncations
+ for (auto Ty : { s16, s32 })
+ setAction({G_FPTRUNC, Ty}, Legal);
+
+ for (auto Ty : { s32, s64 })
+ setAction({G_FPTRUNC, 1, Ty}, Legal);
+
+ for (auto Ty : { s1, s8, s16, s32 })
+ setAction({G_TRUNC, Ty}, Legal);
+
+ for (auto Ty : { s8, s16, s32, s64 })
+ setAction({G_TRUNC, 1, Ty}, Legal);
+
+
// Control-flow
setAction({G_BR, LLT::unsized()}, Legal);
setAction({G_BRCOND, s32}, Legal);
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir?rev=279758&r1=279757&r2=279758&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir Thu Aug 25 12:37:32 2016
@@ -29,7 +29,8 @@ body: |
; CHECK-LABEL: name: test_scalar_add_big
; CHECK-DAG: [[LHS_LO:%.*]](64), [[LHS_HI:%.*]](64) = G_EXTRACT { s64, s64, s128 } %0, 0, 64
; CHECK-DAG: [[RHS_LO:%.*]](64), [[RHS_HI:%.*]](64) = G_EXTRACT { s64, s64, s128 } %1, 0, 64
- ; CHECK-DAG: [[CARRY0:%.*]](1) = G_CONSTANT s1 0
+ ; CHECK-DAG: [[CARRY0_32:%.*]](32) = G_CONSTANT s32 0
+ ; CHECK-DAG: [[CARRY0:%[0-9]+]](1) = G_TRUNC { s1, s32 } [[CARRY0_32]]
; CHECK: [[RES_LO:%.*]](64), [[CARRY:%.*]](1) = G_UADDE s64 [[LHS_LO]], [[RHS_LO]], [[CARRY0]]
; CHECK: [[RES_HI:%.*]](64), {{%.*}}(1) = G_UADDE s64 [[LHS_HI]], [[RHS_HI]], [[CARRY]]
; CHECK: %2(128) = G_SEQUENCE { s128, s64, s64 } [[RES_LO]], 0, [[RES_HI]], 64
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir?rev=279758&r1=279757&r2=279758&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir Thu Aug 25 12:37:32 2016
@@ -20,6 +20,7 @@ registers:
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
+ - { id: 8, class: _ }
body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
@@ -48,4 +49,9 @@ body: |
; CHECK: %7(32) = G_ICMP { s32, s32 } intpred(sle), [[LHS32]], [[RHS32]]
%7(32) = G_ICMP { s32, s8 } intpred(sle), %2, %3
+ ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %2
+ ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %3
+ ; CHECK: [[TST32:%[0-9]+]](32) = G_ICMP { s32, s32 } intpred(ult), [[LHS32]], [[RHS32]]
+ ; CHECK: %8(1) = G_TRUNC { s1, s32 } [[TST32]]
+ %8(1) = G_ICMP { s1, s8 } intpred(ult), %2, %3
...
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