[llvm] r279678 - [Hexagon] Change insertion of expand-condsets pass to avoid memory leaks
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 24 15:27:36 PDT 2016
Author: kparzysz
Date: Wed Aug 24 17:27:36 2016
New Revision: 279678
URL: http://llvm.org/viewvc/llvm-project?rev=279678&view=rev
Log:
[Hexagon] Change insertion of expand-condsets pass to avoid memory leaks
Modified:
llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
Modified: llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp?rev=279678&r1=279677&r2=279678&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp Wed Aug 24 17:27:36 2016
@@ -224,6 +224,10 @@ namespace {
char HexagonExpandCondsets::ID = 0;
+namespace llvm {
+ char &HexagonExpandCondsetsID = HexagonExpandCondsets::ID;
+}
+
INITIALIZE_PASS_BEGIN(HexagonExpandCondsets, "expand-condsets",
"Hexagon Expand Condsets", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=279678&r1=279677&r2=279678&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp Wed Aug 24 17:27:36 2016
@@ -112,6 +112,9 @@ SchedCustomRegistry("hexagon", "Run Hexa
createVLIWMachineSched);
namespace llvm {
+ extern char &HexagonExpandCondsetsID;
+ void initializeHexagonExpandCondsetsPass(PassRegistry&);
+
FunctionPass *createHexagonBitSimplify();
FunctionPass *createHexagonBranchRelaxation();
FunctionPass *createHexagonCallFrameInformation();
@@ -120,7 +123,6 @@ namespace llvm {
FunctionPass *createHexagonConstPropagationPass();
FunctionPass *createHexagonCopyToCombine();
FunctionPass *createHexagonEarlyIfConversion();
- FunctionPass *createHexagonExpandCondsets();
FunctionPass *createHexagonFixupHwLoops();
FunctionPass *createHexagonGenExtract();
FunctionPass *createHexagonGenInsert();
@@ -164,6 +166,7 @@ HexagonTargetMachine::HexagonTargetMachi
TT, CPU, FS, Options, getEffectiveRelocModel(RM), CM,
(HexagonNoOpt ? CodeGenOpt::None : OL)),
TLOF(make_unique<HexagonTargetObjectFile>()) {
+ initializeHexagonExpandCondsetsPass(*PassRegistry::getPassRegistry());
initAsmInfo();
}
@@ -287,10 +290,8 @@ bool HexagonPassConfig::addInstSelector(
void HexagonPassConfig::addPreRegAlloc() {
if (getOptLevel() != CodeGenOpt::None) {
- if (EnableExpandCondsets) {
- Pass *Exp = createHexagonExpandCondsets();
- insertPass(&RegisterCoalescerID, IdentifyingPassPtr(Exp));
- }
+ if (EnableExpandCondsets)
+ insertPass(&RegisterCoalescerID, &HexagonExpandCondsetsID);
if (!DisableStoreWidening)
addPass(createHexagonStoreWidening(), false);
if (!DisableHardwareLoops)
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