powerpc64 failures, Was Not: [llvm] r279573 - MachineFunction: Introduce NoPHIs property
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 24 10:23:38 PDT 2016
+CC Kostya
> On Aug 24, 2016, at 8:18 AM, Bill Seurer via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>
> I tried this by hand. r279571 works fine and with r279572:
>
> FAIL: UBSan-MSan-powerpc64le :: TestCases/TypeCheck/vptr.cpp (95 of 144)
> ******************** TEST 'UBSan-MSan-powerpc64le :: TestCases/TypeCheck/vptr.cpp' FAILED ********************
> Script:
> --
> /home/seurer/llvm/build/llvm-test/./bin/clang --driver-mode=g++ -fsanitize=memory -m64 -frtti -fsanitize=vptr -fno-sanitize-recover=vptr -g /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp -O3 -o /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp
> /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp rT && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp mT && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp fT && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp cT
> /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp rU && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp mU && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp fU && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp cU
> /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp rS && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp rV && /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp oV
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp mS 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-MEMBER --check-prefix=CHECK-Linux-MEMBER --strict-whitespace
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp fS 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-MEMFUN --strict-whitespace
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp cS 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-DOWNCAST --check-prefix=CHECK-Linux-DOWNCAST --strict-whitespace
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp mV 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-MEMBER --check-prefix=CHECK-Linux-MEMBER --strict-whitespace
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp fV 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-MEMFUN --strict-whitespace
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp cV 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-DOWNCAST --check-prefix=CHECK-Linux-DOWNCAST --strict-whitespace
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp oU 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-OFFSET --check-prefix=CHECK-Linux-OFFSET --strict-whitespace
> env UBSAN_OPTIONS=print_stacktrace=1 not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp m0 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-NULL-MEMBER --check-prefix=CHECK-Linux-NULL-MEMBER --strict-whitespace
> (echo "vptr_check:S"; echo "vptr_check:T"; echo "vptr_check:U") > /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"' /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp mS
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"' /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp fS
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"' /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp cS
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"' /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp mV
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"' /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp fV
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"' /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp cV
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"' /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp oU
> echo "vptr_check:S" > /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.loc-supp
> env UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.loc-supp"' not /home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp x- 2>&1 | FileCheck /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp --check-prefix=CHECK-LOC-SUPPRESS
> --
> Exit Code: 1
>
> Command Output (stderr):
> --
> /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:46:12: warning: direct base 'S' is inaccessible due to ambiguity:
> struct U -> struct S
> struct U -> struct T -> struct S [-Winaccessible-base]
> struct U : S, T { virtual int v() { return 2; } };
> ^
> /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:93:9: warning: 'reinterpret_cast' from class 'U *' to its base at non-zero offset 'T *' behaves differently from 'static_cast' [-Wreinterpret-base-class]
> p = reinterpret_cast<T*>(new U);
> ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:93:9: note: use 'static_cast' to adjust the pointer correctly while upcasting
> p = reinterpret_cast<T*>(new U);
> ^~~~~~~~~~~~~~~~
> static_cast
> /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:153:12: warning: 'reinterpret_cast' to class 'U *' from its base at non-zero offset 'T *' behaves differently from 'static_cast' [-Wreinterpret-base-class]
> return reinterpret_cast<U*>(p)->v() - 2;
> ^~~~~~~~~~~~~~~~~~~~~~~
> /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:153:12: note: use 'static_cast' to adjust the pointer correctly while downcasting
> return reinterpret_cast<U*>(p)->v() - 2;
> ^~~~~~~~~~~~~~~~
> static_cast
> 3 warnings generated.
> Test case: rT
> Test case: mT
> Test case: fT
> Test case: cT
> Test case: rU
> Test case: mU
> Test case: fU
> Test case: cU
> Test case: rS
> Test case: rV
> Test case: oV
> /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:124:27: error: expected string not found in input
> // CHECK-MEMBER-NEXT: {{^ .. .. .. .. .. .. .. .. .. .. .. .. }}
> ^
> <stdin>:4:1: note: scanning from here
> <memory cannot be printed>
> ^
> <stdin>:5:10: note: possible intended match here
> #0 0x26d6ca38 in access_p(T*, char) /home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:128:15
> ^
>
> --
>
> ********************
>
> . . .
>
> ********************
> Failing Tests (1):
> UBSan-MSan-powerpc64le :: TestCases/TypeCheck/vptr.cpp
>
> Expected Passes : 135
> Expected Failures : 1
> Unsupported Tests : 7
> Unexpected Failures: 1
>
>
> Note that it is a known issue that the bots do not handle compiler_rt changes very well.
>
> On 08/23/16 19:18, Vitaly Buka via llvm-commits wrote:
>> For some reasons the bot does not report compiler-rt changes, and the
>> build had something very relevant:
>> http://llvm.org/viewvc/llvm-project?revision=279572&view=revision
>>
>> On Tue, Aug 23, 2016 at 4:19 PM Vitaly Buka <vitalybuka at google.com
>> <mailto:vitalybuka at google.com>> wrote:
>>
>> I have no hardware. I will try to build different revisions on the
>> bot to localize issue.
>>
>> On Tue, Aug 23, 2016 at 4:08 PM Matthias Braun <matze at braunis.de
>> <mailto:matze at braunis.de>> wrote:
>>
>> I don't see a connection between the changes and the error
>> symptom... Do you have the possibility to revert just this patch
>> to verify?
>>
>>> On Aug 23, 2016, at 3:13 PM, Vitaly Buka
>>> <vitalybuka at google.com <mailto:vitalybuka at google.com>> wrote:
>>>
>>> This
>>> patch? http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/9417/steps/ninja%20check%201/logs/stdio
>>>
>>> On Tue, Aug 23, 2016 at 2:27 PM Matthias Braun via
>>> llvm-commits <llvm-commits at lists.llvm.org
>>> <mailto:llvm-commits at lists.llvm.org>> wrote:
>>>
>>> Author: matze
>>> Date: Tue Aug 23 16:19:49 2016
>>> New Revision: 279573
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=279573&view=rev
>>> Log:
>>> MachineFunction: Introduce NoPHIs property
>>>
>>> I want to compute the SSA property of .mir files
>>> automatically in
>>> upcoming patches. The problem with this is that some
>>> inputs will be
>>> reported as static single assignment with some passes
>>> claiming not to
>>> support SSA form. In reality though those passes do not
>>> support PHI
>>> instructions => Track the presence of PHI instructions
>>> separate from the
>>> SSA property.
>>>
>>> Differential Revision: https://reviews.llvm.org/D22719
>>>
>>> Modified:
>>> llvm/trunk/include/llvm/CodeGen/MachineFunction.h
>>> llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
>>> llvm/trunk/lib/CodeGen/MachineFunction.cpp
>>> llvm/trunk/lib/CodeGen/MachineVerifier.cpp
>>> llvm/trunk/lib/CodeGen/PHIElimination.cpp
>>> llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
>>> llvm/trunk/lib/CodeGen/RegAllocFast.cpp
>>> llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
>>> llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
>>> llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
>>>
>>> Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/include/llvm/CodeGen/MachineFunction.h
>>> (original)
>>> +++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Tue
>>> Aug 23 16:19:49 2016
>>> @@ -92,6 +92,7 @@ public:
>>> // Property descriptions:
>>> // IsSSA: True when the machine function is in SSA form
>>> and virtual registers
>>> // have a single def.
>>> + // NoPHIs: The machine function does not contain any
>>> PHI instruction.
>>> // TracksLiveness: True when tracking register liveness
>>> accurately.
>>> // While this property is set, register liveness
>>> information in basic block
>>> // live-in lists and machine instruction operands
>>> (e.g. kill flags, implicit
>>> @@ -117,6 +118,7 @@ public:
>>> // all sizes attached to them have been eliminated.
>>> enum class Property : unsigned {
>>> IsSSA,
>>> + NoPHIs,
>>> TracksLiveness,
>>> AllVRegsAllocated,
>>> Legalized,
>>>
>>> Modified: llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp Tue Aug
>>> 23 16:19:49 2016
>>> @@ -160,6 +160,8 @@ private:
>>> ///
>>> /// Return null if the name isn't a register bank.
>>> const RegisterBank *getRegBank(const MachineFunction
>>> &MF, StringRef Name);
>>> +
>>> + void computeFunctionProperties(MachineFunction &MF);
>>> };
>>>
>>> } // end namespace llvm
>>> @@ -279,6 +281,19 @@ void MIRParserImpl::createDummyFunction(
>>> new UnreachableInst(Context, BB);
>>> }
>>>
>>> +static bool hasPHI(const MachineFunction &MF) {
>>> + for (const MachineBasicBlock &MBB : MF)
>>> + for (const MachineInstr &MI : MBB)
>>> + if (MI.isPHI())
>>> + return true;
>>> + return false;
>>> +}
>>> +
>>> +void
>>> MIRParserImpl::computeFunctionProperties(MachineFunction
>>> &MF) {
>>> + if (!hasPHI(MF))
>>> +
>>> MF.getProperties().set(MachineFunctionProperties::Property::NoPHIs);
>>> +}
>>> +
>>> bool
>>> MIRParserImpl::initializeMachineFunction(MachineFunction
>>> &MF) {
>>> auto It = Functions.find(MF.getName());
>>> if (It == Functions.end())
>>> @@ -353,6 +368,9 @@ bool MIRParserImpl::initializeMachineFun
>>> PFS.SM <http://pfs.sm/> = &SM;
>>>
>>> inferRegisterInfo(PFS, YamlMF);
>>> +
>>> + computeFunctionProperties(MF);
>>> +
>>> // FIXME: This is a temporary workaround until the
>>> reserved registers can be
>>> // serialized.
>>> MF.getRegInfo().freezeReservedRegs(MF);
>>>
>>> Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Aug 23
>>> 16:19:49 2016
>>> @@ -60,6 +60,7 @@ static const char *getPropertyName(Machi
>>> case P::AllVRegsAllocated: return "AllVRegsAllocated";
>>> case P::IsSSA: return "IsSSA";
>>> case P::Legalized: return "Legalized";
>>> + case P::NoPHIs: return "NoPHIs";
>>> case P::RegBankSelected: return "RegBankSelected";
>>> case P::Selected: return "Selected";
>>> case P::TracksLiveness: return "TracksLiveness";
>>>
>>> Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Aug 23
>>> 16:19:49 2016
>>> @@ -858,6 +858,10 @@ void MachineVerifier::visitMachineInstrB
>>> << MI->getNumOperands() << " given.\n";
>>> }
>>>
>>> + if (MI->isPHI() && MF->getProperties().hasProperty(
>>> + MachineFunctionProperties::Property::NoPHIs))
>>> + report("Found PHI instruction with NoPHIs property
>>> set", MI);
>>> +
>>> // Check the tied operands.
>>> if (MI->isInlineAsm())
>>> verifyInlineAsm(MI);
>>>
>>> Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Tue Aug 23
>>> 16:19:49 2016
>>> @@ -175,6 +175,8 @@ bool PHIElimination::runOnMachineFunctio
>>> ImpDefs.clear();
>>> VRegPHIUseCount.clear();
>>>
>>> +
>>> MF.getProperties().set(MachineFunctionProperties::Property::NoPHIs);
>>> +
>>> return Changed;
>>> }
>>>
>>>
>>> Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/RegAllocBasic.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/RegAllocBasic.cpp Tue Aug 23
>>> 16:19:49 2016
>>> @@ -105,6 +105,11 @@ public:
>>> /// Perform register allocation.
>>> bool runOnMachineFunction(MachineFunction &mf) override;
>>>
>>> + MachineFunctionProperties getRequiredProperties() const
>>> override {
>>> + return MachineFunctionProperties().set(
>>> + MachineFunctionProperties::Property::NoPHIs);
>>> + }
>>> +
>>> // Helper for spilling all live virtual registers
>>> currently unified under preg
>>> // that interfere with the most recently queried lvr.
>>> Return true if spilling
>>> // was successful, and append any new spilled/split
>>> intervals to splitLVRs.
>>>
>>> Modified: llvm/trunk/lib/CodeGen/RegAllocFast.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/RegAllocFast.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/RegAllocFast.cpp Tue Aug 23
>>> 16:19:49 2016
>>> @@ -158,6 +158,11 @@ namespace {
>>> MachineFunctionPass::getAnalysisUsage(AU);
>>> }
>>>
>>> + MachineFunctionProperties getRequiredProperties()
>>> const override {
>>> + return MachineFunctionProperties().set(
>>> + MachineFunctionProperties::Property::NoPHIs);
>>> + }
>>> +
>>> MachineFunctionProperties getSetProperties() const
>>> override {
>>> return MachineFunctionProperties().set(
>>>
>>> MachineFunctionProperties::Property::AllVRegsAllocated);
>>> @@ -1093,8 +1098,6 @@ bool RAFast::runOnMachineFunction(Machin
>>> UsedInInstr.clear();
>>> UsedInInstr.setUniverse(TRI->getNumRegUnits());
>>>
>>> - assert(!MRI->isSSA() && "regalloc requires leaving SSA");
>>> -
>>> // initialize the virtual->physical register map to
>>> have a 'null'
>>> // mapping for all virtual registers
>>> StackSlotForVirtReg.resize(MRI->getNumVirtRegs());
>>>
>>> Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Aug 23
>>> 16:19:49 2016
>>> @@ -334,6 +334,11 @@ public:
>>> /// Perform register allocation.
>>> bool runOnMachineFunction(MachineFunction &mf) override;
>>>
>>> + MachineFunctionProperties getRequiredProperties() const
>>> override {
>>> + return MachineFunctionProperties().set(
>>> + MachineFunctionProperties::Property::NoPHIs);
>>> + }
>>> +
>>> static char ID;
>>>
>>> private:
>>>
>>> Modified: llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp Tue Aug 23
>>> 16:19:49 2016
>>> @@ -109,6 +109,11 @@ public:
>>> /// Perform register allocation
>>> bool runOnMachineFunction(MachineFunction &MF) override;
>>>
>>> + MachineFunctionProperties getRequiredProperties() const
>>> override {
>>> + return MachineFunctionProperties().set(
>>> + MachineFunctionProperties::Property::NoPHIs);
>>> + }
>>> +
>>> private:
>>>
>>> typedef std::map<const LiveInterval*, unsigned> LI2NodeMap;
>>>
>>> Modified:
>>> llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp?rev=279573&r1=279572&r2=279573&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
>>> (original)
>>> +++ llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
>>> Tue Aug 23 16:19:49 2016
>>> @@ -98,6 +98,11 @@ public:
>>> return "SI Load / Store Optimizer";
>>> }
>>>
>>> + MachineFunctionProperties getRequiredProperties() const
>>> override {
>>> + return MachineFunctionProperties().set(
>>> + MachineFunctionProperties::Property::NoPHIs);
>>> + }
>>> +
>>> void getAnalysisUsage(AnalysisUsage &AU) const override {
>>> AU.setPreservesCFG();
>>> AU.addPreserved<SlotIndexes>();
>>> @@ -425,8 +430,6 @@ bool SILoadStoreOptimizer::runOnMachineF
>>>
>>> DEBUG(dbgs() << "Running SILoadStoreOptimizer\n");
>>>
>>> - assert(!MRI->isSSA());
>>> -
>>> bool Modified = false;
>>>
>>> for (MachineBasicBlock &MBB : MF)
>>>
>>>
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>>>
>>
>>
>>
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>
>
> --
>
> -Bill Seurer
>
> _______________________________________________
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