[PATCH] D23814: AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler

[Tom Stellard via llvm-commits]

tstellarAMD added inline comments.

================
Comment at: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:547-552
@@ -541,13 +546,8 @@
 
   if (getOptLevel() > CodeGenOpt::None) {
-    // Don't do this with no optimizations since it throws away debug info by
-    // merging nonadjacent loads.
-
-    // This should be run after scheduling, but before register allocation. It
-    // also need extra copies to the address operand to be eliminated.
-
-    // FIXME: Move pre-RA and remove extra reg coalescer run.
-    insertPass(&MachineSchedulerID, &SILoadStoreOptimizerID);
+    // FIXME: Remove extra reg coalescer run.  This was required when
+    // we ran the SILoadStoreOptimizer here, but removing it blocks
+    // some of the optimizations in the SIShrinkInstructionsPass.
     insertPass(&MachineSchedulerID, &RegisterCoalescerID);
   }
 
----------------
arsenm wrote:
> The extra run should be removed now
The SIShrinkInstructionsPass depends on the being run.  I don't think we can remove it until we fix the SIShrinkInstructionsPass.


https://reviews.llvm.org/D23814