[llvm] r279569 - GlobalISel: add forgotten test-case for G_ICMP

[Quentin Colombet via llvm-commits]

> On Aug 23, 2016, at 2:56 PM, Tim Northover <tnorthover at apple.com> wrote:
> 
>> 
>> Here however, %0 and %1 becomes s8. I don’t think we want to allow to silently change the wide of a register. I mean that fine after selection but before it seems confusing.
> 
> Agreed. I always thought real IR-derived MIR would have them. I was just lazy and decided the invalid MIR would be harmless for legalization purposes. Sorry, I'll add the required truncs.

Thanks for the confirmation.
At some point we really need to push more check in the verifier for our own goodness :). (Remember the size you fixed where I was copy 64-bit value into 32-bit register or the other way around :P).

> 
>> The other reason why I am bringing that up is because I would have expected comparison to have a second type. I.e., I was expecting that we would have just look at the type of the definition to know that. Like we do for LLVM IR basically. Remains the question of the definition of target specific instruction/copies.
> 
> We might be able to make that work. We'd need G_SCALARTOVECTOR and G_VECTORTOSCALAR instructions (which we might do anyway for big-endian). And probably a G_SETTYPE for any target-specific instructions that get added early.
> 
>> What do you think?
> 
> I'm generally a fan of being explicit about these things so I'd definitely want to make sure we still printed a type for each instruction, which might get tricky mid-IRTranslation. Otherwise debugging scattered code would be a nightmare.
> 
> Other than that, no particular objections.
> 
> Tim.