[llvm] r279511 - [X86][SSE] Demonstrate inability to recognise that (v)cvtpd2ps intrinsics implicitly zeroes the upper half of the xmm
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 23 04:26:29 PDT 2016
Author: rksimon
Date: Tue Aug 23 06:26:28 2016
New Revision: 279511
URL: http://llvm.org/viewvc/llvm-project?rev=279511&view=rev
Log:
[X86][SSE] Demonstrate inability to recognise that (v)cvtpd2ps intrinsics implicitly zeroes the upper half of the xmm
Modified:
llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll
Modified: llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll?rev=279511&r1=279510&r2=279511&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll Tue Aug 23 06:26:28 2016
@@ -225,6 +225,22 @@ define <4 x float> @test_x86_sse2_cvtpd2
}
declare <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double>) nounwind readnone
+define <4 x float> @test_x86_sse2_cvtpd2ps_zext(<2 x double> %a0) nounwind {
+; SSE-LABEL: test_x86_sse2_cvtpd2ps_zext:
+; SSE: ## BB#0:
+; SSE-NEXT: cvtpd2ps %xmm0, %xmm0
+; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
+; SSE-NEXT: retl
+;
+; KNL-LABEL: test_x86_sse2_cvtpd2ps_zext:
+; KNL: ## BB#0:
+; KNL-NEXT: vcvtpd2ps %xmm0, %xmm0
+; KNL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
+; KNL-NEXT: retl
+ %cvt = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0)
+ %res = shufflevector <4 x float> %cvt, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+ ret <4 x float> %res
+}
define <4 x i32> @test_x86_sse2_cvtps2dq(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse2_cvtps2dq:
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