[PATCH] D22696: [CodeGenPrep] Skip merging empty case blocks

[Jun Bum Lim via llvm-commits]

junbuml marked an inline comment as done.

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Comment at: lib/CodeGen/CodeGenPrepare.cpp:424
@@ -412,1 +423,3 @@
 
+    // Try to skip merging if BB is terminated by a switch instruction and BB is
+    // used as an incoming block of a PHI in DestBB. In such case, merging BB
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davidxl wrote:
> If the unique Predecessor of BB is terminated ..
Thanks !

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Comment at: lib/CodeGen/CodeGenPrepare.cpp:427
@@ +426,3 @@
+    // and DestBB would cause ISel to add COPY instructions in the header of
+    // switch.  This could potentially increase dynamic instructions, especially
+    // when the switch is in a loop. By keeping the empty block (BB), ISel will
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davidxl wrote:
> Do you have actual examples showing the problem of extra copy instruction added? I could not connect the dots here.
In my first posting in Diff 1, I added a test case (aarch64-skip-merging-case-block.ll) which was reduced from the benchmark I was targeting. This test case should  show copies in the header of switch which is in a loop and make the situation in CGP. I removed this test as it's unnecessary complex to be used as a test case. Please see aarch64-skip-merging-case-block.ll in Diff 1 and let me know if you want me to add the test in this patch. 

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Comment at: lib/CodeGen/CodeGenPrepare.cpp:444
@@ +443,3 @@
+      if (IsIncomingBlock) {
+        // Since a branch instruction could be added in the empty case block by
+        // skipping merging it, we skip merging the empty case only when the
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davidxl wrote:
> How about the size impact (for Os build) ?
This could potentially add a branch instruction, so we should do this when OptSize is false. 


https://reviews.llvm.org/D22696