[PATCH] D23756: Fixed a bug in type legalizer for masked gather.
Igor Breger via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 21 02:44:23 PDT 2016
igorb created this revision.
igorb added a reviewer: delena.
igorb added a subscriber: llvm-commits.
igorb set the repository for this revision to rL LLVM.
Fixed a bug in type legalizer for masked gather.
https://llvm.org/bugs/show_bug.cgi?id=28312
The problem occurs when the Node doesn't updated in place , UpdateNodeOperation() return the node that already exist.
In this case assert fail in PromoteIntegerOperand() , N have 2 results ( val + chain).
Repository:
rL LLVM
https://reviews.llvm.org/D23756
Files:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
test/CodeGen/X86/pr28312.ll
Index: test/CodeGen/X86/pr28312.ll
===================================================================
--- test/CodeGen/X86/pr28312.ll
+++ test/CodeGen/X86/pr28312.ll
@@ -0,0 +1,39 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=skx < %s | FileCheck %s --check-prefix=SKX
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=knl < %s | FileCheck %s --check-prefix=KNL
+
+define <4 x i64> @test(<4 x i64*> %p1, <4 x i1> %k, <4 x i1> %k2,<4 x i64> %d) {
+; SKX-LABEL: test:
+; SKX: # BB#0:
+; SKX-NEXT: vpslld $31, %xmm1, %xmm1
+; SKX-NEXT: vptestmd %xmm1, %xmm1, %k1
+; SKX-NEXT: vpgatherqq (,%ymm0), %ymm1 {%k1}
+; SKX-NEXT: vpaddq %ymm1, %ymm1, %ymm0
+; SKX-NEXT: vpaddq %ymm1, %ymm0, %ymm0
+; SKX-NEXT: retq
+;
+; KNL-LABEL: test:
+; KNL: # BB#0:
+; KNL-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL-NEXT: vpslld $31, %xmm1, %xmm1
+; KNL-NEXT: vpsrad $31, %xmm1, %xmm1
+; KNL-NEXT: vpmovsxdq %xmm1, %ymm1
+; KNL-NEXT: vpxord %zmm2, %zmm2, %zmm2
+; KNL-NEXT: vinserti64x4 $0, %ymm1, %zmm2, %zmm1
+; KNL-NEXT: vpsllq $63, %zmm1, %zmm1
+; KNL-NEXT: vptestmq %zmm1, %zmm1, %k1
+; KNL-NEXT: vpgatherqq (,%zmm0), %zmm1 {%k1}
+; KNL-NEXT: vpaddq %ymm1, %ymm1, %ymm0
+; KNL-NEXT: vpaddq %ymm1, %ymm0, %ymm0
+; KNL-NEXT: retq
+ %g1 = call <4 x i64> @llvm.masked.gather.v4i64(<4 x i64*> %p1, i32 8, <4 x i1> %k, <4 x i64> undef)
+ %g2 = call <4 x i64> @llvm.masked.gather.v4i64(<4 x i64*> %p1, i32 8, <4 x i1> %k, <4 x i64> undef)
+ %g3 = call <4 x i64> @llvm.masked.gather.v4i64(<4 x i64*> %p1, i32 8, <4 x i1> %k, <4 x i64> undef)
+ %a = add <4 x i64> %g1, %g2
+ %b = add <4 x i64> %a, %g3
+ ret <4 x i64> %b
+}
+
+declare <4 x i64> @llvm.masked.gather.v4i64(<4 x i64*>, i32, <4 x i1>, <4 x i64>)
+declare void @llvm.masked.scatter.v4i64(<4 x i64>, <4 x i64*>, i32, <4 x i1>)
+
Index: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1235,7 +1235,15 @@
NewOps[OpNo] = PromoteTargetBoolean(N->getOperand(OpNo), DataVT);
} else
NewOps[OpNo] = GetPromotedInteger(N->getOperand(OpNo));
- return SDValue(DAG.UpdateNodeOperands(N, NewOps), 0);
+
+ SDValue Res = SDValue(DAG.UpdateNodeOperands(N, NewOps), 0);
+ // updated in place.
+ if (Res.getNode() == N)
+ return Res;
+
+ ReplaceValueWith(SDValue(N, 0), Res.getValue(0));
+ ReplaceValueWith(SDValue(N, 1), Res.getValue(1));
+ return SDValue();
}
SDValue DAGTypeLegalizer::PromoteIntOp_MSCATTER(MaskedScatterSDNode *N,
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