[llvm] r279157 - [SystemZ] Use valid base/index regs for inline asm

[Zhan Jun Liau via llvm-commits]

Author: zhanjunl
Date: Thu Aug 18 16:44:15 2016
New Revision: 279157

URL: http://llvm.org/viewvc/llvm-project?rev=279157&view=rev
Log:
[SystemZ] Use valid base/index regs for inline asm

Summary:
Inline asm memory constraints can have the base or index register be assigned
to %r0 right now. Make sure that we assign only ADDR64 registers to the base
and index.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23367

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
    llvm/trunk/test/CodeGen/SystemZ/asm-02.ll

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp?rev=279157&r1=279156&r2=279157&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp Thu Aug 18 16:44:15 2016
@@ -1375,6 +1375,29 @@ SelectInlineAsmMemoryOperand(const SDVal
   }
 
   if (selectBDXAddr(Form, DispRange, Op, Base, Disp, Index)) {
+    const TargetRegisterClass *TRC =
+      Subtarget->getRegisterInfo()->getPointerRegClass(*MF);
+    SDLoc DL(Base);
+    SDValue RC = CurDAG->getTargetConstant(TRC->getID(), DL, MVT::i32);
+
+    // Make sure that the base address doesn't go into %r0.
+    // If it's a TargetFrameIndex or a fixed register, we shouldn't do anything.
+    if (Base.getOpcode() != ISD::TargetFrameIndex &&
+        Base.getOpcode() != ISD::Register) {
+      Base =
+        SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
+                                       DL, Base.getValueType(),
+                                       Base, RC), 0);
+    }
+
+    // Make sure that the index register isn't assigned to %r0 either.
+    if (Index.getOpcode() != ISD::Register) {
+      Index =
+        SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
+                                       DL, Index.getValueType(),
+                                       Index, RC), 0);
+    }
+
     OutOps.push_back(Base);
     OutOps.push_back(Disp);
     OutOps.push_back(Index);

Modified: llvm/trunk/test/CodeGen/SystemZ/asm-02.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/asm-02.ll?rev=279157&r1=279156&r2=279157&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/asm-02.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/asm-02.ll Thu Aug 18 16:44:15 2016
@@ -74,8 +74,8 @@ define void @f6(i64 %base, i64 %index) {
 ; Check that LAY is used if there is an index but the displacement is too large
 define void @f7(i64 %base, i64 %index) {
 ; CHECK-LABEL: f7:
-; CHECK: lay %r0, 4096(%r3,%r2)
-; CHECK: blah 0(%r0)
+; CHECK: lay %r1, 4096(%r3,%r2)
+; CHECK: blah 0(%r1)
 ; CHECK: br %r14
   %add = add i64 %base, 4096
   %addi = add i64 %add, %index