[PATCH] D23677: [AArch64] Reuse register with known value when generating csneg and csinv instructions.

[Eli Friedman via llvm-commits]

efriedma added inline comments.

================
Comment at: test/CodeGen/AArch64/arm64-csel.ll:241
@@ +240,3 @@
+  ret i32 %res
+}
+
----------------
Currently, trunk generates the following for foo20:

        cmp     w0, #1
        orr     w8, wzr, #0x1
        cneg    w0, w8, ne
        ret

This is "w0 == 1 ? 1 : -1"


With your patch, we generate... this?

        cmp     w0, #1
        cneg    w0, w0, ne
        ret

Unless I'm missing something, this is "w0 == 1 ? w0 : -w0", which is not the same thing.


https://reviews.llvm.org/D23677