[PATCH] D23670: Split RC::getSize into RC::getSpillSize and RC::getRegSize

[Krzysztof Parzyszek via llvm-commits]

kparzysz created this revision.
kparzysz added reviewers: arsenm, MatzeB.
kparzysz added a subscriber: llvm-commits.
kparzysz set the repository for this revision to rL LLVM.
Herald added a reviewer: tstellarAMD.
Herald added subscribers: nemanjai, arsenm.

The function getSize in MCRegisterClass and TargetRegisterClass actually refers to the size of the spill slot needed for registers from this class.  This may or may not be equal to the actual size of the register, since the register's representation in memory may not be identical to the register itself.
Moreover, the comments in the MCRegisterInfo.h and TargetRegisterInfo.h explicitly state that the function getSize refers to both, the size of the register and the size of the spill slot.

This patch will provide two new member functions: getSpillSize and getRegSize in both MCRegisterClass and TargetRegisterClass, each returning only the value corresponding to the name. The existing function getSize will remain until all callers are updated to use one of the new functions.


Repository:
  rL LLVM

https://reviews.llvm.org/D23670

Files:
  include/llvm/MC/MCRegisterInfo.h
  include/llvm/Target/Target.td
  include/llvm/Target/TargetRegisterInfo.h
  lib/Target/AArch64/AArch64RegisterInfo.td
  lib/Target/AMDGPU/SIRegisterInfo.td
  lib/Target/ARM/ARMRegisterInfo.td
  lib/Target/Hexagon/HexagonRegisterInfo.td
  lib/Target/Mips/MipsRegisterInfo.td
  lib/Target/PowerPC/PPCRegisterInfo.td
  lib/Target/SystemZ/SystemZRegisterInfo.td
  lib/Target/X86/X86RegisterInfo.td
  utils/TableGen/CodeGenRegisters.cpp
  utils/TableGen/CodeGenRegisters.h
  utils/TableGen/RegisterInfoEmitter.cpp

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