[PATCH] D21473: [mips] Fix aui/daui/dahi/dati for MIPSR6

[Daniel Sanders via llvm-commits]

dsanders added a comment.

I have a couple minor comments, the main one is the dubious disassembler test.


================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:597-600
@@ +596,6 @@
+  InsnType Imm = fieldFromInstruction(insn, 0, 16);
+  MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
+                                       Rt)));
+  MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
+                                       Rt)));
+  MI.addOperand(MCOperand::createImm(Imm));
----------------
GPR32 -> GPR64

================
Comment at: lib/Target/Mips/Mips32r6InstrInfo.td:319
@@ -318,3 +318,3 @@
   dag OutOperandList = (outs GPROpnd:$rs);
-  dag InOperandList = (ins GPROpnd:$rt, simm16:$imm);
+  dag InOperandList = (ins GPROpnd:$rt, uimm16:$imm);
   string AsmString = !strconcat(instr_asm, "\t$rs, $rt, $imm");
----------------
It feels wrong to have a simm16 immediate in the instruction but only accept uimm16 inputs in the assembly but I agree that this is the intended behaviour.

I think we should render it to the instruction as a simm16 so that the MCInst's are consistent though.

================
Comment at: test/MC/Disassembler/Mips/micromips64r6/valid.txt:38-39
@@ -37,4 +37,4 @@
 0xf0 0x64 0x00 0x05 # CHECK: daui $3, $4, 5
-0x42 0x23 0x00 0x04 # CHECK: dahi $3, 4
-0x42 0x03 0x00 0x04 # CHECK: dati $3, 4
+0x42 0x23 0x00 0x04 # CHECK: dahi $17, $17, 4
+0x42 0x03 0x00 0x04 # CHECK: dati $16, $16, 4
 0x59 0x26 0x30 0xec # CHECK: dext $9, $6, 3, 7
----------------
This doesn't look correct to me. I haven't double-checked the encodings but there's only one bit different between the two instructions yet two things are different in the assembly (dahi->dati, and $16 -> $17)

Also, could you comment on why it isn't $3 any more?


https://reviews.llvm.org/D21473