[llvm] r278995 - [InstCombine] add test for missing vector icmp fold

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Aug 17 17:18:57 2016
New Revision: 278995

URL: http://llvm.org/viewvc/llvm-project?rev=278995&view=rev
Log:
[InstCombine] add test for missing vector icmp fold

Also, add a scalar test to demonstrate one of the intermediate folds that
is necessary to accomplish the existing, multi-step test. And simplify
the vector tests to only check the final piece of that multi-step transform.

Modified:
    llvm/trunk/test/Transforms/InstCombine/icmp.ll

Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=278995&r1=278994&r2=278995&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Wed Aug 17 17:18:57 2016
@@ -1848,6 +1848,30 @@ define <2 x i1> @icmp_and_X_-16_ne-16_ve
   ret <2 x i1> %cmp
 }
 
+define i1 @shrink_constant(i32 %X) {
+; CHECK-LABEL: @shrink_constant(
+; CHECK-NEXT:    [[XOR:%.*]] = xor i32 %X, -12
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[XOR]], 4
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %xor = xor i32 %X, -9
+  %cmp = icmp ult i32 %xor, 4
+  ret i1 %cmp
+}
+
+; FIXME: This doesn't change because of a limitation in 'DemandedBitsLHSMask'.
+define <2 x i1> @shrink_constant_vec(<2 x i32> %X) {
+; CHECK-LABEL: @shrink_constant_vec(
+; CHECK-NEXT:    [[XOR:%.*]] = xor <2 x i32> %X, <i32 -9, i32 -9>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[XOR]], <i32 4, i32 4>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %xor = xor <2 x i32> %X, <i32 -9, i32 -9>
+  %cmp = icmp ult <2 x i32> %xor, <i32 4, i32 4>
+  ret <2 x i1> %cmp
+}
+
+; This test requires 3 different transforms to get to the result.
 define i1 @icmp_sub_-1_X_ult_4(i32 %X) {
 ; CHECK-LABEL: @icmp_sub_-1_X_ult_4(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 %X, -5
@@ -1859,14 +1883,14 @@ define i1 @icmp_sub_-1_X_ult_4(i32 %X) {
 }
 
 ; FIXME: Vectors should fold too.
-define <2 x i1> @icmp_sub_neg1_X_ult_4_vec(<2 x i32> %X) {
-; CHECK-LABEL: @icmp_sub_neg1_X_ult_4_vec(
-; CHECK-NEXT:    [[SUB:%.*]] = xor <2 x i32> %X, <i32 -1, i32 -1>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[SUB]], <i32 4, i32 4>
+define <2 x i1> @icmp_xor_neg4_X_ult_4_vec(<2 x i32> %X) {
+; CHECK-LABEL: @icmp_xor_neg4_X_ult_4_vec(
+; CHECK-NEXT:    [[XOR:%.*]] = xor <2 x i32> %X, <i32 -4, i32 -4>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[XOR]], <i32 4, i32 4>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
-  %sub = sub <2 x i32> <i32 -1, i32 -1>, %X
-  %cmp = icmp ult <2 x i32> %sub, <i32 4, i32 4>
+  %xor = xor <2 x i32> %X, <i32 -4, i32 -4>
+  %cmp = icmp ult <2 x i32> %xor, <i32 4, i32 4>
   ret <2 x i1> %cmp
 }
 
@@ -1881,14 +1905,14 @@ define i1 @icmp_sub_-1_X_uge_4(i32 %X) {
 }
 
 ; FIXME: Vectors should fold too.
-define <2 x i1> @icmp_sub_neg1_X_uge_4_vec(<2 x i32> %X) {
-; CHECK-LABEL: @icmp_sub_neg1_X_uge_4_vec(
-; CHECK-NEXT:    [[SUB:%.*]] = xor <2 x i32> %X, <i32 -1, i32 -1>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i32> [[SUB]], <i32 3, i32 3>
+define <2 x i1> @icmp_xor_neg4_X_uge_4_vec(<2 x i32> %X) {
+; CHECK-LABEL: @icmp_xor_neg4_X_uge_4_vec(
+; CHECK-NEXT:    [[XOR:%.*]] = xor <2 x i32> %X, <i32 -4, i32 -4>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i32> [[XOR]], <i32 3, i32 3>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
-  %sub = sub <2 x i32> <i32 -1, i32 -1>, %X
-  %cmp = icmp uge <2 x i32> %sub, <i32 4, i32 4>
+  %xor = xor <2 x i32> %X, <i32 -4, i32 -4>
+  %cmp = icmp uge <2 x i32> %xor, <i32 4, i32 4>
   ret <2 x i1> %cmp
 }