[PATCH] D23620: AMDGPU: Fix sched type for branches

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 17 11:55:24 PDT 2016


arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added subscribers: kzhuravl, arsenm.

https://reviews.llvm.org/D23620

Files:
  lib/Target/AMDGPU/SIInstructions.td

Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -429,7 +429,7 @@
   let isReturn = 1;
 }
 
-let isBranch = 1 in {
+let isBranch = 1, SchedRW = [WriteBranch] in {
 def S_BRANCH : SOPP <
   0x00000002, (ins sopp_brtarget:$simm16), "s_branch $simm16",
   [(br bb:$simm16)]> {


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