[PATCH] D23620: AMDGPU: Fix sched type for branches
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 17 11:55:24 PDT 2016
arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added subscribers: kzhuravl, arsenm.
https://reviews.llvm.org/D23620
Files:
lib/Target/AMDGPU/SIInstructions.td
Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -429,7 +429,7 @@
let isReturn = 1;
}
-let isBranch = 1 in {
+let isBranch = 1, SchedRW = [WriteBranch] in {
def S_BRANCH : SOPP <
0x00000002, (ins sopp_brtarget:$simm16), "s_branch $simm16",
[(br bb:$simm16)]> {
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D23620.68395.patch
Type: text/x-patch
Size: 419 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160817/f0c79f73/attachment-0001.bin>
More information about the llvm-commits
mailing list