[PATCH] D23121: [mips] Add l.[sd] and s.[sd] instruction aliases

[Vasileios Kalintiris via llvm-commits]

vkalintiris accepted this revision.
vkalintiris added a comment.
This revision is now accepted and ready to land.

LGTM with two small test fixes.


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Comment at: test/MC/Mips/mips32r6/valid.s:142-143
@@ -139,2 +141,4 @@
                                  # CHECK-NEXT: .set  pop      # encoding: [0x7c,0x1d,0x58,0x3b]
+        s.s     $f2, 8($3)       # CHECK: s.s  $f2, 8($3)     # encoding: [0xe4,0x62,0x00,0x08]
+        s.d     $f2, 8($3)       # CHECK: s.d  $f2, 8($3)     # encoding: [0xf4,0x62,0x00,0x08]
         sel.d   $f0,$f1,$f2      # CHECK: sel.d $f0, $f1, $f2 # encoding: [0x46,0x22,0x08,0x10]
----------------
Currently, the check patterns expect the s.{s,d} aliases instead of the actual instructions.

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Comment at: test/MC/Mips/mips64r6/valid.s:199-200
@@ -196,2 +198,4 @@
         rint.s $f2, $f4          # CHECK: rint.s $f2, $f4        # encoding: [0x46,0x00,0x20,0x9a]
+        s.s    $f2, 8($3)        # CHECK: s.s  $f2, 8($3)        # encoding: [0xe4,0x62,0x00,0x08]
+        s.d    $f2, 8($3)        # CHECK: s.d  $f2, 8($3)        # encoding: [0xf4,0x62,0x00,0x08]
         sc      $15,-40($s3)     # CHECK: sc $15, -40($19)       # encoding: [0x7e,0x6f,0xec,0x26]
----------------
Currently, the check patterns expect the s.{s,d} aliases instead of the actual instructions.


Repository:
  rL LLVM

https://reviews.llvm.org/D23121