[llvm] r278757 - [InstCombine] add tests for missing vector icmp folds

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Mon Aug 15 17:43:52 2016
New Revision: 278757

URL: http://llvm.org/viewvc/llvm-project?rev=278757&view=rev
Log:
[InstCombine] add tests for missing vector icmp folds

Modified:
    llvm/trunk/test/Transforms/InstCombine/icmp.ll

Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=278757&r1=278756&r2=278757&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Mon Aug 15 17:43:52 2016
@@ -1466,6 +1466,18 @@ define i1 @icmp_shl_1_V_ult_32(i32 %V) {
   ret i1 %cmp
 }
 
+; FIXME: Vectors should fold too.
+define <2 x i1> @icmp_shl_1_V_ult_32_vec(<2 x i32> %V) {
+; CHECK-LABEL: @icmp_shl_1_V_ult_32_vec(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[SHL]], <i32 32, i32 32>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %shl = shl <2 x i32> <i32 1, i32 1>, %V
+  %cmp = icmp ult <2 x i32> %shl, <i32 32, i32 32>
+  ret <2 x i1> %cmp
+}
+
 define i1 @icmp_shl_1_V_eq_32(i32 %V) {
 ; CHECK-LABEL: @icmp_shl_1_V_eq_32(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 %V, 5
@@ -1476,6 +1488,18 @@ define i1 @icmp_shl_1_V_eq_32(i32 %V) {
   ret i1 %cmp
 }
 
+; FIXME: Vectors should fold too.
+define <2 x i1> @icmp_shl_1_V_eq_32_vec(<2 x i32> %V) {
+; CHECK-LABEL: @icmp_shl_1_V_eq_32_vec(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq <2 x i32> [[SHL]], <i32 32, i32 32>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %shl = shl <2 x i32> <i32 1, i32 1>, %V
+  %cmp = icmp eq <2 x i32> %shl, <i32 32, i32 32>
+  ret <2 x i1> %cmp
+}
+
 define i1 @icmp_shl_1_V_ult_30(i32 %V) {
 ; CHECK-LABEL: @icmp_shl_1_V_ult_30(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 %V, 5
@@ -1486,6 +1510,18 @@ define i1 @icmp_shl_1_V_ult_30(i32 %V) {
   ret i1 %cmp
 }
 
+; FIXME: Vectors should fold too.
+define <2 x i1> @icmp_shl_1_V_ult_30_vec(<2 x i32> %V) {
+; CHECK-LABEL: @icmp_shl_1_V_ult_30_vec(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[SHL]], <i32 30, i32 30>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %shl = shl <2 x i32> <i32 1, i32 1>, %V
+  %cmp = icmp ult <2 x i32> %shl, <i32 30, i32 30>
+  ret <2 x i1> %cmp
+}
+
 define i1 @icmp_shl_1_V_ugt_30(i32 %V) {
 ; CHECK-LABEL: @icmp_shl_1_V_ugt_30(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 %V, 4
@@ -1496,6 +1532,18 @@ define i1 @icmp_shl_1_V_ugt_30(i32 %V) {
   ret i1 %cmp
 }
 
+; FIXME: Vectors should fold too.
+define <2 x i1> @icmp_shl_1_V_ugt_30_vec(<2 x i32> %V) {
+; CHECK-LABEL: @icmp_shl_1_V_ugt_30_vec(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i32> [[SHL]], <i32 30, i32 30>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %shl = shl <2 x i32> <i32 1, i32 1>, %V
+  %cmp = icmp ugt <2 x i32> %shl, <i32 30, i32 30>
+  ret <2 x i1> %cmp
+}
+
 define i1 @icmp_shl_1_V_ule_30(i32 %V) {
 ; CHECK-LABEL: @icmp_shl_1_V_ule_30(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 %V, 5
@@ -1506,6 +1554,18 @@ define i1 @icmp_shl_1_V_ule_30(i32 %V) {
   ret i1 %cmp
 }
 
+; FIXME: Vectors should fold too.
+define <2 x i1> @icmp_shl_1_V_ule_30_vec(<2 x i32> %V) {
+; CHECK-LABEL: @icmp_shl_1_V_ule_30_vec(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[SHL]], <i32 31, i32 31>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %shl = shl <2 x i32> <i32 1, i32 1>, %V
+  %cmp = icmp ule <2 x i32> %shl, <i32 30, i32 30>
+  ret <2 x i1> %cmp
+}
+
 define i1 @icmp_shl_1_V_uge_30(i32 %V) {
 ; CHECK-LABEL: @icmp_shl_1_V_uge_30(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 %V, 4
@@ -1516,6 +1576,18 @@ define i1 @icmp_shl_1_V_uge_30(i32 %V) {
   ret i1 %cmp
 }
 
+; FIXME: Vectors should fold too.
+define <2 x i1> @icmp_shl_1_V_uge_30_vec(<2 x i32> %V) {
+; CHECK-LABEL: @icmp_shl_1_V_uge_30_vec(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i32> [[SHL]], <i32 29, i32 29>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %shl = shl <2 x i32> <i32 1, i32 1>, %V
+  %cmp = icmp uge <2 x i32> %shl, <i32 30, i32 30>
+  ret <2 x i1> %cmp
+}
+
 define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) {
 ; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 %V, 31