[PATCH] D21562: [AMDGPU] Wave and register controls

Tom Stellard via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 15 05:09:14 PDT 2016


tstellarAMD added inline comments.

================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:153-155
@@ -213,7 +152,5 @@
                                                 unsigned Idx) const {
-  const SISubtarget &STI = MF.getSubtarget<SISubtarget>();
-  // FIXME: We should adjust the max number of waves based on LDS size.
-  unsigned SGPRLimit = getNumSGPRsAllowed(STI, STI.getMaxWavesPerCU());
-  unsigned VGPRLimit = getNumVGPRsAllowed(STI.getMaxWavesPerCU());
+  unsigned SGPRLimit = getMaxNumSGPRs(MF);
+  unsigned VGPRLimit = getMaxNumVGPRs(MF);
 
   unsigned VSLimit = SGPRLimit + VGPRLimit;
----------------
The fix for this is more complicated than I thought.  I think we should fix this by maintaining the current behavior of this function.

This means that if the user does not specify any attributes that would limit the number of registers, then SGPRLimit and VGPRLimit should be set to the 10 waves per CU limits (24 VGPR and .48/80 SGPRS depending on the target).

If the user does specify attributes to limit the number of registers the function should return AMDGPURegisterInfo::getRegPressureSetLimit().


https://reviews.llvm.org/D21562





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