[PATCH] D23435: AMDGPU: Fix replacing idxen mubuf instructions with addr64

[Tom Stellard via llvm-commits]

tstellarAMD added inline comments.

================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:2531-2539
@@ +2530,11 @@
+
+        // NewVaddrLo = SRsrcPtr:sub0 + vaddr
+        BuildMI(MBB, Addr64, DL, get(AMDGPU::V_ADD_I32_e32), AddLo)
+          .addReg(SRsrcPtr, 0, AMDGPU::sub0)
+          .addReg(VAddr->getReg(), 0, VAddr->getSubReg());
+
+        // NewVaddrHi = SRsrcPtr:sub1 + carry
+        BuildMI(MBB, Addr64, DL, get(AMDGPU::V_ADDC_U32_e32), AddHi)
+          .addImm(0)
+          .addReg(SRsrcPtr, 0, AMDGPU::sub1);
+
----------------
The legalization is more complicated because we need to check the stride and tid_enable bits on the resource and do:

ptr = ptr + (stride * (index + tid))

I think instead of lowering this, we should try harder to put the base pointer in SGPRs, though I'm not sure of a good way to do that.


https://reviews.llvm.org/D23435