[llvm] r278402 - Revert rL278384 which caused several buildbot failures (like check failures in CodeGen/X86/clz.ll).

Wei Mi via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 11 13:33:37 PDT 2016


Author: wmi
Date: Thu Aug 11 15:33:37 2016
New Revision: 278402

URL: http://llvm.org/viewvc/llvm-project?rev=278402&view=rev
Log:
Revert rL278384 which caused several buildbot failures (like check failures in CodeGen/X86/clz.ll).

Modified:
    llvm/trunk/include/llvm/Target/TargetInstrInfo.h
    llvm/trunk/test/CodeGen/X86/MachineSink-SubReg.ll

Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=278402&r1=278401&r2=278402&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Thu Aug 11 15:33:37 2016
@@ -270,8 +270,11 @@ public:
   /// MachineSink determines on its own whether the instruction is safe to sink;
   /// this gives the target a hook to override the default behavior with regards
   /// to which instructions should be sunk.
+  /// The default behavior is to not sink insert_subreg, subreg_to_reg, and
+  /// reg_sequence. These are meant to be close to the source to make it easier
+  /// to coalesce.
   virtual bool shouldSink(const MachineInstr &MI) const {
-    return true;
+    return !MI.isInsertSubreg() && !MI.isSubregToReg() && !MI.isRegSequence();
   }
 
   /// Re-issue the specified 'original' instruction at the

Modified: llvm/trunk/test/CodeGen/X86/MachineSink-SubReg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/MachineSink-SubReg.ll?rev=278402&r1=278401&r2=278402&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/MachineSink-SubReg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/MachineSink-SubReg.ll Thu Aug 11 15:33:37 2016
@@ -1,37 +0,0 @@
-; PR28852: Check machine code sinking is not stopped by SUBREG_TO_REG.
-; RUN: llc < %s | FileCheck %s
-
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-; CHECK: foo
-; CHECK-NOT: imull
-; CHECK: retq
-; CHECK: imull
-
-define void @foo(i64 %value, i32 %kLengthBits, i32* nocapture %bits, i64* nocapture %bit_buffer_64, i32 %x) local_unnamed_addr {
-entry:
-  %mul = mul i32 %x, %kLengthBits
-  %add = add i32 %mul, 3
-  %conv = zext i32 %add to i64
-  %mul2 = mul nuw nsw i64 %conv, 5
-  %sub = sub i64 64, %value
-  %conv4 = trunc i64 %sub to i32
-  %tmp0 = load i32, i32* %bits, align 4
-  %cmp = icmp ult i32 %tmp0, %conv4
-  br i1 %cmp, label %if.then, label %if.end, !prof !0
-
-if.then:                                          ; preds = %entry
-  %add7 = add i64 %mul2, %value
-  %tmp1 = load i64, i64* %bit_buffer_64, align 8
-  %add8 = add i64 %add7, %tmp1
-  store i64 %add8, i64* %bit_buffer_64, align 8
-  %conv9 = trunc i64 %mul2 to i32
-  store i32 %conv9, i32* %bits, align 4
-  br label %if.end
-
-if.end:                                           ; preds = %if.then, %entry
-  ret void
-}
-
-!0 = !{!"branch_weights", i32 1, i32 2000}




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