[PATCH] D23347: [AVX512] Fix insertelement i1 lowering.

[Elena Demikhovsky via llvm-commits]

delena added inline comments.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12652
@@ +12651,3 @@
+
+  //insert into first/last elm can be done by SHIFT + OR
+  if (IdxVal == 0 ) {
----------------
Insertion of one bit into first or last position can be done with two SHIFTs + OR.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12655
@@ +12654,3 @@
+    // EltInVec already at correct index and other bits are 0.
+    // Clean lsb bit in vector.
+    Vec = DAG.getNode(X86ISD::VSRLI, dl, VecVT, Vec,
----------------
lsb -> the first

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12656
@@ +12655,3 @@
+    // Clean lsb bit in vector.
+    Vec = DAG.getNode(X86ISD::VSRLI, dl, VecVT, Vec,
+                           DAG.getConstant(1 , dl, MVT::i8));
----------------
Line alignment.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12664
@@ -12635,1 +12663,3 @@
+  if (IdxVal == NumElems -1) {
+    // Set bit at index, all other bits already 0.
     EltInVec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, EltInVec,
----------------
Move the bit to the last position inside the vector.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12667
@@ -12636,4 +12666,3 @@
                            DAG.getConstant(IdxVal, dl, MVT::i8));
-  if (Vec.isUndef())
-    return EltInVec;
-  return DAG.getNode(ISD::OR, dl, VecVT, Vec, EltInVec);
+    // Clean msb bit in vector.
+    Vec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, Vec,
----------------
Clean the last bit in the source vector.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12679
@@ +12678,3 @@
+  for (unsigned i = 0; i != NumElems; ++i)
+    MaskVec[i] = (i == IdxVal) ? NumElems : i;
+
----------------
MaskVec[i] = (i == IdxVal) ? 0 : i+NumElements;

or swap parameters in getVectorShuffle()


Repository:
  rL LLVM

https://reviews.llvm.org/D23347