[llvm] r278313 - [WebAssembly] Cleanup trailing whitespace

[Dominic Chen via llvm-commits]

Author: ddcc
Date: Wed Aug 10 23:10:56 2016
New Revision: 278313

URL: http://llvm.org/viewvc/llvm-project?rev=278313&view=rev
Log:
[WebAssembly] Cleanup trailing whitespace

Summary: Test for commit access.

Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D23392

Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp?rev=278313&r1=278312&r2=278313&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp Wed Aug 10 23:10:56 2016
@@ -303,7 +303,7 @@ static bool IsSafeToMove(const MachineIn
 
     // Ask LiveIntervals whether moving this virtual register use or def to
     // Insert will change which value numbers are seen.
-    // 
+    //
     // If the operand is a use of a register that is also defined in the same
     // instruction, test that the newly defined value reaches the insert point,
     // since the operand will be moving along with the def.
@@ -384,7 +384,7 @@ static bool OneUseDominatesOtherUses(uns
         //
         // This is needed as a consequence of using implicit get_locals for
         // uses and implicit set_locals for defs.
-        if (UseInst->getDesc().getNumDefs() == 0) 
+        if (UseInst->getDesc().getNumDefs() == 0)
           return false;
         const MachineOperand &MO = UseInst->getOperand(0);
         if (!MO.isReg())