[llvm] r278245 - GlobalISel: avoid inserting redundant COPYs for bitcasts.
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 10 09:51:15 PDT 2016
Author: tnorthover
Date: Wed Aug 10 11:51:14 2016
New Revision: 278245
URL: http://llvm.org/viewvc/llvm-project?rev=278245&view=rev
Log:
GlobalISel: avoid inserting redundant COPYs for bitcasts.
If the value produced by the bitcast hasn't been referenced yet, we can simply
reuse the input register avoiding an unnecessary COPY instruction.
Modified:
llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
Modified: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=278245&r1=278244&r2=278245&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp Wed Aug 10 11:51:14 2016
@@ -166,8 +166,11 @@ bool IRTranslator::translateStore(const
bool IRTranslator::translateBitCast(const CastInst &CI) {
if (LLT{*CI.getDestTy()} == LLT{*CI.getSrcTy()}) {
- MIRBuilder.buildCopy(getOrCreateVReg(CI),
- getOrCreateVReg(*CI.getOperand(0)));
+ unsigned &Reg = ValToVReg[&CI];
+ if (Reg)
+ MIRBuilder.buildCopy(Reg, getOrCreateVReg(*CI.getOperand(0)));
+ else
+ Reg = getOrCreateVReg(*CI.getOperand(0));
return true;
}
return translateCast(TargetOpcode::G_BITCAST, CI);
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll?rev=278245&r1=278244&r2=278245&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll Wed Aug 10 11:51:14 2016
@@ -214,14 +214,33 @@ define i64* @inttoptr(i64 %a) {
; CHECK-LABEL: name: trivial_bitcast
; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
-; CHECK: [[RES:%[0-9]+]](64) = COPY [[ARG1]]
-; CHECK: %x0 = COPY [[RES]]
+; CHECK: %x0 = COPY [[ARG1]]
; CHECK: RET_ReallyLR implicit %x0
define i64* @trivial_bitcast(i8* %a) {
%val = bitcast i8* %a to i64*
ret i64* %val
}
+; CHECK-LABEL: name: trivial_bitcast_with_copy
+; CHECK: [[A:%[0-9]+]](64) = COPY %x0
+; CHECK: G_BR unsized %[[CAST:bb\.[0-9]+]]
+
+; CHECK: [[CAST]]:
+; CHECK: {{%[0-9]+}}(64) = COPY [[A]]
+; CHECK: G_BR unsized %[[END:bb\.[0-9]+]]
+
+; CHECK: [[END]]:
+define i64* @trivial_bitcast_with_copy(i8* %a) {
+ br label %cast
+
+end:
+ ret i64* %val
+
+cast:
+ %val = bitcast i8* %a to i64*
+ br label %end
+}
+
; CHECK-LABEL: name: bitcast
; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
; CHECK: [[RES1:%[0-9]+]](64) = G_BITCAST { <2 x s32>, s64 } [[ARG1]]
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