[PATCH] D23330: [DAGCombine] Avoid INSERT_SUBVECTOR reinsertions (PR28678)

Michael Kuperstein via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 9 16:08:06 PDT 2016


mkuper added a comment.

LGTM.

Although I'm somewhat curious about how we even end up with this pattern - I guess for test_mm256_insert_epi64, we really need to have two insert_elements post-legalization, but why do we end up with two insert_subvectors?


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:13810
@@ -13808,1 +13809,3 @@
 
+  // If the input vector is another INSERT_SUBVECTOR, and this insert replaces
+  // the last insertion, then insert into the common source vector.
----------------
Could you make this comment slightly easier to parse? It's probably my fault, but took me a bit too long to understand what you meant. :-)
Maybe explicitly say that both insert into the same lane, instead of (or in addition to) using "replaces"?


Repository:
  rL LLVM

https://reviews.llvm.org/D23330





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