[PATCH] D23337: [x86, AVX] allow FP vector select folding to bitwise logic ops (PR28895)

[Sanjay Patel via llvm-commits]

spatel created this revision.
spatel added reviewers: delena, RKSimon, andreadb.
spatel added a subscriber: llvm-commits.
Herald added a subscriber: mcrosier.

This handles the case in:
https://llvm.org/bugs/show_bug.cgi?id=28895

...but I suspect that we may not be getting all of the possibilities yet. Eg, we can use 'X86::FANDN' for scalar FP select combines.



https://reviews.llvm.org/D23337

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avx512-cvt.ll
  test/CodeGen/X86/select-with-and-or.ll

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