[PATCH] D23286: AMDGPU/SI: Propose to redefine image load/store intrinsics

[Changpeng Fang via llvm-commits]

cfang created this revision.
cfang added reviewers: arsenm, tstellarAMD.
cfang added subscribers: arsenm, llvm-commits.
Herald added a subscriber: kzhuravl.

This is a proposal to sync the definition of image load/store intrinsics with these pf samplers: https://reviews.llvm.org/D22838. 

1. define vdata type to be llvm_anyfloat_ty, address type to be llvm_anyfloat_ty, and rsrc type to be llvm_anyint_ty as a result, we expect the intrinsics name to have three suffixes to overload each of these three types;

2. D128 as well as two other flags are implied in the three types, for example, if you use v8i32 as rsrc type, then r128 is true!

3. don't expose TFE flag and unorm flag (set to 1),  and other flags are exposed in the instruction order: unrm, glc, slc, lwe and da.

4. LIT tests are not fully updated now!


https://reviews.llvm.org/D23286

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/SIInstructions.td
  test/CodeGen/AMDGPU/llvm.amdgcn.image.ll

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