[llvm] r277916 - Move helpers into anonymous namespaces. NFC.
Benjamin Kramer via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 6 04:13:10 PDT 2016
Author: d0k
Date: Sat Aug 6 06:13:10 2016
New Revision: 277916
URL: http://llvm.org/viewvc/llvm-project?rev=277916&view=rev
Log:
Move helpers into anonymous namespaces. NFC.
Modified:
llvm/trunk/lib/CodeGen/AsmPrinter/AddressPool.cpp
llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
llvm/trunk/lib/CodeGen/LiveRegMatrix.cpp
llvm/trunk/lib/CodeGen/MachinePipeliner.cpp
llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp
llvm/trunk/lib/CodeGen/ShrinkWrap.cpp
llvm/trunk/lib/IR/Verifier.cpp
llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp
llvm/trunk/lib/Target/X86/X86OptimizeLEAs.cpp
llvm/trunk/lib/Transforms/Utils/Local.cpp
llvm/trunk/lib/Transforms/Utils/NameAnonFunctions.cpp
llvm/trunk/lib/Transforms/Vectorize/SLPVectorizer.cpp
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AddressPool.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AddressPool.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AddressPool.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AddressPool.cpp Sat Aug 6 06:13:10 2016
@@ -14,8 +14,6 @@
using namespace llvm;
-class MCExpr;
-
unsigned AddressPool::getIndex(const MCSymbol *Sym, bool TLS) {
HasBeenUsed = true;
auto IterBool =
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Sat Aug 6 06:13:10 2016
@@ -349,7 +349,7 @@ bool DwarfDebug::isLexicalScopeDIENull(L
return !getLabelAfterInsn(Ranges.front().second);
}
-template <typename Func> void forBothCUs(DwarfCompileUnit &CU, Func F) {
+template <typename Func> static void forBothCUs(DwarfCompileUnit &CU, Func F) {
F(CU);
if (auto *SkelCU = CU.getSkeleton())
F(*SkelCU);
Modified: llvm/trunk/lib/CodeGen/LiveRegMatrix.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRegMatrix.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRegMatrix.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveRegMatrix.cpp Sat Aug 6 06:13:10 2016
@@ -70,9 +70,10 @@ void LiveRegMatrix::releaseMemory() {
}
}
-template<typename Callable>
-bool foreachUnit(const TargetRegisterInfo *TRI, LiveInterval &VRegInterval,
- unsigned PhysReg, Callable Func) {
+template <typename Callable>
+static bool foreachUnit(const TargetRegisterInfo *TRI,
+ LiveInterval &VRegInterval, unsigned PhysReg,
+ Callable Func) {
if (VRegInterval.hasSubRanges()) {
for (MCRegUnitMaskIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
unsigned Unit = (*Units).first;
Modified: llvm/trunk/lib/CodeGen/MachinePipeliner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachinePipeliner.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachinePipeliner.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachinePipeliner.cpp Sat Aug 6 06:13:10 2016
@@ -98,8 +98,9 @@ STATISTIC(NumTrytoPipeline, "Number of l
STATISTIC(NumPipelined, "Number of loops software pipelined");
/// A command line option to turn software pipelining on or off.
-cl::opt<bool> EnableSWP("enable-pipeliner", cl::Hidden, cl::init(true),
- cl::ZeroOrMore, cl::desc("Enable Software Pipelining"));
+static cl::opt<bool> EnableSWP("enable-pipeliner", cl::Hidden, cl::init(true),
+ cl::ZeroOrMore,
+ cl::desc("Enable Software Pipelining"));
/// A command line option to enable SWP at -Os.
static cl::opt<bool> EnableSWPOptSize("enable-pipeliner-opt-size",
Modified: llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp Sat Aug 6 06:13:10 2016
@@ -22,7 +22,7 @@ using namespace llvm;
#define DEBUG_TYPE "ip-regalloc"
-cl::opt<bool> DumpRegUsage(
+static cl::opt<bool> DumpRegUsage(
"print-regusage", cl::init(false), cl::Hidden,
cl::desc("print register usage details collected for analysis."));
Modified: llvm/trunk/lib/CodeGen/ShrinkWrap.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ShrinkWrap.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ShrinkWrap.cpp (original)
+++ llvm/trunk/lib/CodeGen/ShrinkWrap.cpp Sat Aug 6 06:13:10 2016
@@ -256,8 +256,8 @@ bool ShrinkWrap::useOrDefCSROrFI(const M
/// \brief Helper function to find the immediate (post) dominator.
template <typename ListOfBBs, typename DominanceAnalysis>
-MachineBasicBlock *FindIDom(MachineBasicBlock &Block, ListOfBBs BBs,
- DominanceAnalysis &Dom) {
+static MachineBasicBlock *FindIDom(MachineBasicBlock &Block, ListOfBBs BBs,
+ DominanceAnalysis &Dom) {
MachineBasicBlock *IDom = &Block;
for (MachineBasicBlock *BB : BBs) {
IDom = Dom.findNearestCommonDominator(IDom, BB);
Modified: llvm/trunk/lib/IR/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/Verifier.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/IR/Verifier.cpp (original)
+++ llvm/trunk/lib/IR/Verifier.cpp Sat Aug 6 06:13:10 2016
@@ -762,7 +762,7 @@ static bool isScope(const Metadata *MD)
static bool isDINode(const Metadata *MD) { return !MD || isa<DINode>(MD); }
template <class Ty>
-bool isValidMetadataArrayImpl(const MDTuple &N, bool AllowNull) {
+static bool isValidMetadataArrayImpl(const MDTuple &N, bool AllowNull) {
for (Metadata *MD : N.operands()) {
if (MD) {
if (!isa<Ty>(MD))
@@ -775,13 +775,11 @@ bool isValidMetadataArrayImpl(const MDTu
return true;
}
-template <class Ty>
-bool isValidMetadataArray(const MDTuple &N) {
+template <class Ty> static bool isValidMetadataArray(const MDTuple &N) {
return isValidMetadataArrayImpl<Ty>(N, /* AllowNull */ false);
}
-template <class Ty>
-bool isValidMetadataNullArray(const MDTuple &N) {
+template <class Ty> static bool isValidMetadataNullArray(const MDTuple &N) {
return isValidMetadataArrayImpl<Ty>(N, /* AllowNull */ true);
}
Modified: llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp Sat Aug 6 06:13:10 2016
@@ -869,7 +869,7 @@ static bool produceCompactUnwindFrame(Ma
Attrs.hasAttrSomewhere(Attribute::SwiftError));
}
-
+namespace {
struct RegPairInfo {
RegPairInfo() : Reg1(AArch64::NoRegister), Reg2(AArch64::NoRegister) {}
unsigned Reg1;
@@ -879,6 +879,7 @@ struct RegPairInfo {
bool IsGPR;
bool isPaired() const { return Reg2 != AArch64::NoRegister; }
};
+} // end anonymous namespace
static void computeCalleeSaveRegisterPairs(
MachineFunction &MF, const std::vector<CalleeSavedInfo> &CSI,
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Sat Aug 6 06:13:10 2016
@@ -1028,6 +1028,7 @@ static bool areCFlagsAliveInSuccessors(M
return false;
}
+namespace {
struct UsedNZCV {
bool N;
bool Z;
@@ -1042,6 +1043,7 @@ struct UsedNZCV {
return *this;
}
};
+} // end anonymous namespace
/// Find a condition code used by the instruction.
/// Returns AArch64CC::Invalid if either the instruction does not use condition
Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp Sat Aug 6 06:13:10 2016
@@ -1583,6 +1583,7 @@ int HexagonDAGToDAGISel::getHeight(SDNod
return RootHeights[N];
}
+namespace {
struct WeightedLeaf {
SDValue Value;
int Weight;
@@ -1673,6 +1674,7 @@ public:
LeafPrioQueue(unsigned Opcode) :
HaveConst(false), Opcode(Opcode) { }
};
+} // end anonymous namespace
WeightedLeaf LeafPrioQueue::findSHL(uint64_t MaxAmount) {
int ResultPos;
Modified: llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp Sat Aug 6 06:13:10 2016
@@ -51,6 +51,7 @@ using namespace llvm;
#define DEBUG_TYPE "misched"
+namespace {
class HexagonCallMutation : public ScheduleDAGMutation {
public:
void apply(ScheduleDAGInstrs *DAG) override;
@@ -58,6 +59,7 @@ private:
bool shouldTFRICallBind(const HexagonInstrInfo &HII,
const SUnit &Inst1, const SUnit &Inst2) const;
};
+} // end anonymous namespace
// Check if a call and subsequent A2_tfrpi instructions should maintain
// scheduling affinity. We are looking for the TFRI to be consumed in
Modified: llvm/trunk/lib/Target/X86/X86OptimizeLEAs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86OptimizeLEAs.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86OptimizeLEAs.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86OptimizeLEAs.cpp Sat Aug 6 06:13:10 2016
@@ -44,12 +44,6 @@ static cl::opt<bool>
STATISTIC(NumSubstLEAs, "Number of LEA instruction substitutions");
STATISTIC(NumRedundantLEAs, "Number of redundant LEA instructions removed");
-class MemOpKey;
-
-/// \brief Returns a hash table key based on memory operands of \p MI. The
-/// number of the first memory operand of \p MI is specified through \p N.
-static inline MemOpKey getMemOpKey(const MachineInstr &MI, unsigned N);
-
/// \brief Returns true if two machine operands are identical and they are not
/// physical registers.
static inline bool isIdenticalOp(const MachineOperand &MO1,
@@ -63,6 +57,7 @@ static bool isSimilarDispOp(const Machin
/// \brief Returns true if the instruction is LEA.
static inline bool isLEA(const MachineInstr &MI);
+namespace {
/// A key based on instruction's memory operands.
class MemOpKey {
public:
@@ -95,6 +90,7 @@ public:
// Address' displacement operand.
const MachineOperand *Disp;
};
+} // end anonymous namespace
/// Provide DenseMapInfo for MemOpKey.
namespace llvm {
@@ -168,6 +164,8 @@ template <> struct DenseMapInfo<MemOpKey
};
}
+/// \brief Returns a hash table key based on memory operands of \p MI. The
+/// number of the first memory operand of \p MI is specified through \p N.
static inline MemOpKey getMemOpKey(const MachineInstr &MI, unsigned N) {
assert((isLEA(MI) || MI.mayLoadOrStore()) &&
"The instruction must be a LEA, a load or a store");
Modified: llvm/trunk/lib/Transforms/Utils/Local.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/Local.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/Local.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/Local.cpp Sat Aug 6 06:13:10 2016
@@ -1703,6 +1703,7 @@ bool llvm::callsGCLeafFunction(Immutable
return false;
}
+namespace {
/// A potential constituent of a bitreverse or bswap expression. See
/// collectBitParts for a fuller explanation.
struct BitPart {
@@ -1718,6 +1719,7 @@ struct BitPart {
enum { Unset = -1 };
};
+} // end anonymous namespace
/// Analyze the specified subexpression and see if it is capable of providing
/// pieces of a bswap or bitreverse. The subexpression provides a potential
Modified: llvm/trunk/lib/Transforms/Utils/NameAnonFunctions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/NameAnonFunctions.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/NameAnonFunctions.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/NameAnonFunctions.cpp Sat Aug 6 06:13:10 2016
@@ -19,6 +19,7 @@
using namespace llvm;
+namespace {
// Compute a "unique" hash for the module based on the name of the public
// functions.
class ModuleHasher {
@@ -57,6 +58,7 @@ public:
return TheHash;
}
};
+} // end anonymous namespace
// Rename all the anon functions in the module
bool llvm::nameUnamedFunctions(Module &M) {
Modified: llvm/trunk/lib/Transforms/Vectorize/SLPVectorizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Vectorize/SLPVectorizer.cpp?rev=277916&r1=277915&r2=277916&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Vectorize/SLPVectorizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Vectorize/SLPVectorizer.cpp Sat Aug 6 06:13:10 2016
@@ -3942,7 +3942,7 @@ static Value *createRdxShuffleMask(unsig
return ConstantVector::get(ShuffleMask);
}
-
+namespace {
/// Model horizontal reductions.
///
/// A horizontal reduction is a tree of reduction operations (currently add and
@@ -4228,6 +4228,7 @@ private:
return Builder.CreateExtractElement(TmpVec, Builder.getInt32(0));
}
};
+} // end anonymous namespace
/// \brief Recognize construction of vectors like
/// %ra = insertelement <4 x float> undef, float %s0, i32 0
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