[llvm] r277865 - [ARM] Constant Materialize: imms with specific value can be encoded into mov.w
Weiming Zhao via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 5 13:58:29 PDT 2016
Author: weimingz
Date: Fri Aug 5 15:58:29 2016
New Revision: 277865
URL: http://llvm.org/viewvc/llvm-project?rev=277865&view=rev
Log:
[ARM] Constant Materialize: imms with specific value can be encoded into mov.w
Summary: Thumb2 supports encoding immediates with specific patterns into mov.w by splatting the low 8 bits into other bytes.
I'm resubmitting this patch. The test case in the original commit
r277610 does not specify triple, so builds with differnt default triple
will have different output.
This patch fixed trile as thumb-darwin-apple.
Reviewers: john.brawn, jmolloy, bruno
Subscribers: jmolloy, aemerson, rengolin, samparker, llvm-commits
Differential Revision: https://reviews.llvm.org/D23090
Modified:
llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/trunk/test/CodeGen/ARM/subtarget-no-movt.ll
Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=277865&r1=277864&r2=277865&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Fri Aug 5 15:58:29 2016
@@ -476,7 +476,9 @@ bool ARMDAGToDAGISel::isShifterOpProfita
unsigned ARMDAGToDAGISel::ConstantMaterializationCost(unsigned Val) const {
if (Subtarget->isThumb()) {
if (Val <= 255) return 1; // MOV
- if (Subtarget->hasV6T2Ops() && Val <= 0xffff) return 1; // MOVW
+ if (Subtarget->hasV6T2Ops() &&
+ (Val <= 0xffff || ARM_AM::getT2SOImmValSplatVal(Val) != -1))
+ return 1; // MOVW
if (Val <= 510) return 2; // MOV + ADDi8
if (~Val <= 255) return 2; // MOV + MVN
if (ARM_AM::isThumbImmShiftedVal(Val)) return 2; // MOV + LSL
Modified: llvm/trunk/test/CodeGen/ARM/subtarget-no-movt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/subtarget-no-movt.ll?rev=277865&r1=277864&r2=277865&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/subtarget-no-movt.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/subtarget-no-movt.ll Fri Aug 5 15:58:29 2016
@@ -1,24 +1,40 @@
; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - | FileCheck -check-prefix=NO-OPTION %s
; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=-no-movt | FileCheck -check-prefix=USE-MOVT %s
; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=+no-movt | FileCheck -check-prefix=NO-USE-MOVT %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-no-movt | FileCheck -check-prefix=USE-MOVT %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+no-movt | FileCheck -check-prefix=NO-USE-MOVT %s
+; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION-O0 %s
+; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-no-movt | FileCheck -check-prefix=USE-MOVT-O0 %s
+; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+no-movt | FileCheck -check-prefix=NO-USE-MOVT-O0 %s
+
+target triple = "thumb-apple-darwin"
; NO-OPTION-LABEL: {{_?}}foo0
; NO-OPTION: ldr [[R0:r[0-9]+]], [[L0:.*]]
; NO-OPTION: [[L0]]:
; NO-OPTION: .long 2296237089
+; NO-OPTION-O0-LABEL: {{_?}}foo0
+; NO-OPTION-O0: ldr [[R0:r[0-9]+]], [[L0:.*]]
+; NO-OPTION-O0: [[L0]]:
+; NO-OPTION-O0: .long 2296237089
+
; USE-MOVT-LABEL: {{_?}}foo0
; USE-MOVT: movw [[R0:r[0-9]+]], #52257
; USE-MOVT: movt [[R0]], #35037
+; USE-MOVT-O0-LABEL: {{_?}}foo0
+; USE-MOVT-O0: movw [[R0:r[0-9]+]], #52257
+; USE-MOVT-O0: movt [[R0]], #35037
+
; NO-USE-MOVT-LABEL: {{_?}}foo0
; NO-USE-MOVT: ldr [[R0:r[0-9]+]], [[L0:.*]]
; NO-USE-MOVT: [[L0]]:
; NO-USE-MOVT: .long 2296237089
+; NO-USE-MOVT-O0-LABEL: {{_?}}foo0
+; NO-USE-MOVT-O0: ldr [[R0:r[0-9]+]], [[L0:.*]]
+; NO-USE-MOVT-O0: [[L0]]:
+; NO-USE-MOVT-O0: .long 2296237089
+
define i32 @foo0(i32 %a) #0 {
%1 = xor i32 -1998730207, %a
ret i32 %1
@@ -28,18 +44,56 @@ define i32 @foo0(i32 %a) #0 {
; NO-OPTION: movw [[R0:r[0-9]+]], #52257
; NO-OPTION: movt [[R0]], #35037
+; NO-OPTION-O0-LABEL: {{_?}}foo1
+; NO-OPTION-O0: movw [[R0:r[0-9]+]], #52257
+; NO-OPTION-O0: movt [[R0]], #35037
+
; USE-MOVT-LABEL: {{_?}}foo1
; USE-MOVT: movw [[R0:r[0-9]+]], #52257
; USE-MOVT: movt [[R0]], #35037
+; USE-MOVT-O0-LABEL: {{_?}}foo1
+; USE-MOVT-O0: movw [[R0:r[0-9]+]], #52257
+; USE-MOVT-O0: movt [[R0]], #35037
+
; NO-USE-MOVT-LABEL: {{_?}}foo1
; NO-USE-MOVT: ldr [[R0:r[0-9]+]], [[L0:.*]]
; NO-USE-MOVT: [[L0]]:
; NO-USE-MOVT: .long 2296237089
+; NO-USE-MOVT-O0-LABEL: {{_?}}foo1
+; NO-USE-MOVT-O0: ldr [[R0:r[0-9]+]], [[L0:.*]]
+; NO-USE-MOVT-O0: [[L0]]:
+; NO-USE-MOVT-O0: .long 2296237089
+
define i32 @foo1(i32 %a) {
%1 = xor i32 -1998730207, %a
ret i32 %1
}
+; NO-OPTION-LABEL: {{_?}}foo2
+; NO-OPTION: mov.w [[R0:r[0-9]+]], #-536813568
+
+; USE-MOVT-LABEL: {{_?}}foo2
+; USE-MOVT: mov.w [[R0:r[0-9]+]], #-536813568
+
+; NO-USE-MOVT-LABEL: {{_?}}foo2
+; NO-USE-MOVT: mov.w [[R0:r[0-9]+]], #-536813568
+
+; NO-OPTION-O0-LABEL: {{_?}}foo2
+; NO-OPTION-O0: movw [[R0:r[0-9]+]], #57344
+; NO-OPTION-O0: movt [[R0]], #57344
+
+; USE-MOVT-O0-LABEL: {{_?}}foo2
+; USE-MOVT-O0: movw [[R0:r[0-9]+]], #57344
+; USE-MOVTT-O0: movt [[R0]], #57344
+
+; NO-USE-MOVT-O0-LABEL: {{_?}}foo2
+; NO-USE-MOVT-O0: ldr [[R0:r[0-9]+]], [[L0:.*]]
+; NO-USE-MOVT-O0: [[L0]]:
+; NO-USE-MOVT-O0: .long 3758153728 @ 0xe000e000
+define i32 @foo2() {
+ %1 = load i32, i32* inttoptr (i32 -536813568 to i32*) ; load from 0xe000e000
+ ret i32 %1
+}
attributes #0 = { "target-features"="+no-movt" }
More information about the llvm-commits
mailing list