[PATCH] D22632: Wrong code generation for VSX floating-point loads with fast-isel

[Kit Barton via llvm-commits]

kbarton added inline comments.

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Comment at: lib/Target/PowerPC/PPCFastISel.cpp:528
@@ -524,3 +527,3 @@
   bool IsVSSRC = (ResultReg != 0) && isVSSRCRegister(ResultReg);
   bool IsVSFRC = (ResultReg != 0) && isVSFRCRegister(ResultReg);
   bool Is32VSXLoad = IsVSSRC && Opc == PPC::LFS;
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Should these two utility routines now change?
In particular, don't need to check for ResultReg != 0, since that should never happen. They can also get the register class ID from the UseRC variable directly, instead of having to look it up through the MRI (lines 149, 152).


https://reviews.llvm.org/D22632