[PATCH] D23100: [wasm] Fix FastISel generating NoReg

[Derek Schuff via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL277742: [WebAssembly] Check return value of getRegForValue in FastISel (authored by dschuff).

Changed prior to commit:
  https://reviews.llvm.org/D23100?vs=66819&id=66830#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D23100

Files:
  llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
  llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll

Index: llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll
===================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll
+++ llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -fast-isel -verify-machineinstrs | FileCheck %s
+
+; Test that FastISel does not generate instructions with NoReg
+
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK: i32.const $push0=, 0
+define hidden i32 @a() #0 {
+entry:
+  ret i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32)
+}
+
+; CHECK: i32.const $push0=, 1
+; CHECK: br_if 0, $pop0
+define hidden i32 @b() #0 {
+entry:
+  br i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null), label %a, label %b
+a:
+  unreachable
+b:
+  ret i32 0
+}
+
+; CHECK: i32.const $push1=, 0
+; CHECK: i32.const $push2=, 0
+; CHECK: i32.store $drop=, 0($pop1), $pop2
+define hidden i32 @c() #0 {
+entry:
+  store i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32), i32* inttoptr (i32 0 to i32 *)
+  ret i32 0
+}
+
+attributes #0 = { noinline optnone }
Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
===================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -388,6 +388,9 @@
 
 unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V,
                                               MVT::SimpleValueType From) {
+  if (Reg == 0)
+    return 0;
+
   switch (From) {
   case MVT::i1:
     // If the value is naturally an i1, we don't need to mask it.
@@ -422,6 +425,9 @@
 
 unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V,
                                               MVT::SimpleValueType From) {
+  if (Reg == 0)
+    return 0;
+
   switch (From) {
   case MVT::i1:
   case MVT::i8:
@@ -1121,6 +1127,8 @@
   materializeLoadStoreOperands(Addr);
 
   unsigned ValueReg = getRegForValue(Store->getValueOperand());
+  if (ValueReg == 0)
+    return false;
   if (VTIsi1)
     ValueReg = maskI1Value(ValueReg, Store->getValueOperand());
 
@@ -1147,6 +1155,8 @@
 
   bool Not;
   unsigned CondReg = getRegForI1Value(Br->getCondition(), Not);
+  if (CondReg == 0)
+    return false;
 
   unsigned Opc = WebAssembly::BR_IF;
   if (Not)
@@ -1214,6 +1224,9 @@
   else
     Reg = getRegForValue(RV);
 
+  if (Reg == 0)
+    return false;
+
   BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc)).addReg(Reg);
   return true;
 }


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