[llvm] r277742 - [WebAssembly] Check return value of getRegForValue in FastISel
Derek Schuff via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 4 11:01:53 PDT 2016
Author: dschuff
Date: Thu Aug 4 13:01:52 2016
New Revision: 277742
URL: http://llvm.org/viewvc/llvm-project?rev=277742&view=rev
Log:
[WebAssembly] Check return value of getRegForValue in FastISel
Previously, FastISel for WebAssembly wasn't checking the return value of
`getRegForValue` in certain cases, which would generate instructions
referencing NoReg. This patch fixes this behavior.
Patch by Dominic Chen
Differential Revision: https://reviews.llvm.org/D23100
Added:
llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll
Modified:
llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp?rev=277742&r1=277741&r2=277742&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp Thu Aug 4 13:01:52 2016
@@ -388,6 +388,9 @@ unsigned WebAssemblyFastISel::getRegForI
unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V,
MVT::SimpleValueType From) {
+ if (Reg == 0)
+ return 0;
+
switch (From) {
case MVT::i1:
// If the value is naturally an i1, we don't need to mask it.
@@ -422,6 +425,9 @@ unsigned WebAssemblyFastISel::zeroExtend
unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V,
MVT::SimpleValueType From) {
+ if (Reg == 0)
+ return 0;
+
switch (From) {
case MVT::i1:
case MVT::i8:
@@ -1121,6 +1127,8 @@ bool WebAssemblyFastISel::selectStore(co
materializeLoadStoreOperands(Addr);
unsigned ValueReg = getRegForValue(Store->getValueOperand());
+ if (ValueReg == 0)
+ return false;
if (VTIsi1)
ValueReg = maskI1Value(ValueReg, Store->getValueOperand());
@@ -1147,6 +1155,8 @@ bool WebAssemblyFastISel::selectBr(const
bool Not;
unsigned CondReg = getRegForI1Value(Br->getCondition(), Not);
+ if (CondReg == 0)
+ return false;
unsigned Opc = WebAssembly::BR_IF;
if (Not)
@@ -1214,6 +1224,9 @@ bool WebAssemblyFastISel::selectRet(cons
else
Reg = getRegForValue(RV);
+ if (Reg == 0)
+ return false;
+
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc)).addReg(Reg);
return true;
}
Added: llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll?rev=277742&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll (added)
+++ llvm/trunk/test/CodeGen/WebAssembly/fast-isel-noreg.ll Thu Aug 4 13:01:52 2016
@@ -0,0 +1,35 @@
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -fast-isel -verify-machineinstrs | FileCheck %s
+
+; Test that FastISel does not generate instructions with NoReg
+
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK: i32.const $push0=, 0
+define hidden i32 @a() #0 {
+entry:
+ ret i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32)
+}
+
+; CHECK: i32.const $push0=, 1
+; CHECK: br_if 0, $pop0
+define hidden i32 @b() #0 {
+entry:
+ br i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null), label %a, label %b
+a:
+ unreachable
+b:
+ ret i32 0
+}
+
+; CHECK: i32.const $push1=, 0
+; CHECK: i32.const $push2=, 0
+; CHECK: i32.store $drop=, 0($pop1), $pop2
+define hidden i32 @c() #0 {
+entry:
+ store i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32), i32* inttoptr (i32 0 to i32 *)
+ ret i32 0
+}
+
+attributes #0 = { noinline optnone }
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