[PATCH] D21562: [AMDGPU] Wave and register controls

[Tom Stellard via llvm-commits]

tstellarAMD added a comment.

LGTM.  We just need to resolve the scheduler bug first, and then I think this can be committed.


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Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:153-154
@@ -213,6 +152,4 @@
                                                 unsigned Idx) const {
-  const SISubtarget &STI = MF.getSubtarget<SISubtarget>();
-  // FIXME: We should adjust the max number of waves based on LDS size.
-  unsigned SGPRLimit = getNumSGPRsAllowed(STI, STI.getMaxWavesPerCU());
-  unsigned VGPRLimit = getNumVGPRsAllowed(STI.getMaxWavesPerCU());
+  unsigned SGPRLimit = getMaxNumSGPRs(MF);
+  unsigned VGPRLimit = getMaxNumVGPRs(MF);
 
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This actually uncovers a bug, because the scheduler will subtract the number of reserved registers from the value returned by this function, which in some cases gives us a negative pressure set limit.  I think we need to remove this function before this patch can be committed.  I will look into this.


https://reviews.llvm.org/D21562