[llvm] r277700 - AMDGPU: Fix a slow test by using basic regalloc

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Thu Aug  4 02:04:54 2016
New Revision: 277700

URL: http://llvm.org/viewvc/llvm-project?rev=277700&view=rev
Log:
AMDGPU: Fix a slow test by using basic regalloc

This just tests that the register limit isn't exceeded,
so the regisetr allocation doesn't need to be great.'

The critically slow part is all in greedy RA, so
switch to basic.

Modified:
    llvm/trunk/test/CodeGen/AMDGPU/large-work-group-registers.ll

Modified: llvm/trunk/test/CodeGen/AMDGPU/large-work-group-registers.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/large-work-group-registers.ll?rev=277700&r1=277699&r2=277700&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/large-work-group-registers.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/large-work-group-registers.ll Thu Aug  4 02:04:54 2016
@@ -1,4 +1,4 @@
-; RUN: llc -march=amdgcn -mcpu=tonga -post-RA-scheduler=0 < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -regalloc=basic -post-RA-scheduler=0 < %s | FileCheck %s
 
 ; CHECK: NumVgprs: 64
 define void @main([9 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <8 x i32>] addrspace(2)* byval, [16 x <8 x i32>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, <3 x i32> inreg, <3 x i32> inreg, <3 x i32>) #0 {