[PATCH] D22520: [mips] zeroext and logical 'and' mask optimizations

[Simon Dardis via llvm-commits]

sdardis marked 3 inline comments as done.

================
Comment at: lib/Target/Mips/MipsInstrInfo.td:2638-2645
@@ +2637,10 @@
+
+// A mask with leading zeros and trailing ones, greater than 16 bits in size
+// (as andi can already do it).
+def : MipsPat<(VT (and RT:$src, immLOMask32:$imm)),
+                       (EXTOP RT:$src, 0, (immLOMaskSize $imm))>;
+
+// A mask with leading ones and trailing zeros, 32 bits in size.
+def : MipsPat<(VT (and RT:$src, immHIMask32:$imm)),
+                  (INSOP ZEROReg, 0, (immInvMaskSize $imm), RT:$src)>;
+}
----------------
I was considering that but judged to a bit too specific do do in the first round of this potential patch series. I mostly wanted to hit the bad cases of zext.


https://reviews.llvm.org/D22520