[PATCH] D23053: [COFF][ARM] Clear the J1 and J2 bits when applying relocations to 24 bit branches

[Martin Storsjö via llvm-commits]

mstorsjo created this revision.
mstorsjo added a subscriber: llvm-commits.
Herald added subscribers: samparker, rengolin, aemerson.

The opcode for the bl branches are initially F000 F800, i.e. the J1 and
J2 bits are already set. Therefore mask these bits out before or'ing
in the new bits.


https://reviews.llvm.org/D23053

Files:
  COFF/Chunks.cpp
  test/COFF/reloc-arm.test

Index: test/COFF/reloc-arm.test
===================================================================
--- test/COFF/reloc-arm.test
+++ test/COFF/reloc-arm.test
@@ -9,7 +9,7 @@
 # CHECK: 402030 fe07e62f 00000000 00000000 00000000
 # CHECK: 402040 3e04de2f 00000000 00000000 00000000
 # CHECK: 402050 fe07d62f 00000000 00000000 00000000
-# CHECK: 402060 00000000 00000000 00000000 00000000
+# CHECK: 402060 fef0cef7 00000000 00000000 00000000
 
 --- !COFF
 header:
@@ -23,7 +23,7 @@
   - Name:            .text
     Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_PURGEABLE, IMAGE_SCN_MEM_16BIT, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
     Alignment:       4096
-    SectionData:     00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
+    SectionData:     00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f000f8000000000000000000000000
     Relocations:
       - VirtualAddress:  0
         SymbolName:      foo
@@ -43,6 +43,9 @@
       - VirtualAddress:  80
         SymbolName:      foo
         Type:            21  # IMAGE_REL_AMD64_BLX23T
+      - VirtualAddress:  96
+        SymbolName:      bar
+        Type:            20  # IMAGE_REL_ARM_BRANCH24T
 symbols:
   - Name:            .aaa
     Value:           0
@@ -68,4 +71,10 @@
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
+  - Name:            bar
+    Value:           0x500000
+    SectionNumber:   1
+    SimpleType:      IMAGE_SYM_TYPE_NULL
+    ComplexType:     IMAGE_SYM_DTYPE_NULL
+    StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
 ...
Index: COFF/Chunks.cpp
===================================================================
--- COFF/Chunks.cpp
+++ COFF/Chunks.cpp
@@ -103,7 +103,9 @@
   uint32_t J1 = ((~V >> 23) & 1) ^ S;
   uint32_t J2 = ((~V >> 22) & 1) ^ S;
   or16(Off, (S << 10) | ((V >> 12) & 0x3ff));
-  or16(Off + 2, (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
+  // The J1 and J2 bits are set in the opcode already, so mask them out
+  // before or'ing in the new bits.
+  write16le(Off + 2, (read16le(Off + 2) & 0xd000) | (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
 }
 
 void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, Defined *Sym,


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