[PATCH] D22838: AMDGPU/SI: Implement amdgcn image intrinsics

[Matt Arsenault via llvm-commits]

arsenm added a comment.

In https://reviews.llvm.org/D22838#501936, @mareko wrote:

> BTW, SLC and GLC bits definitely SHOULD be exposed. LLVM isn't high-level enough to be able to make any assumptions about cache strategies.


GLC and SLC should still be separate parameters from the format mask (or metadata should control these like it will for non temporal regular loads/stores)


https://reviews.llvm.org/D22838