[PATCH] D23002: DAGCombiner: check isZExtFree before doing combine

escha via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 31 11:21:34 PDT 2016


escha created this revision.
escha added a reviewer: arsenm.
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escha set the repository for this revision to rL LLVM.

No in-tree effect as of now (as far as I know), but is logical, and allows me to do some certain combines that would otherwise infinite loop.

What the change does: doesn't convert zext(op(zext(X))) to op(zext(X))

Why: the larger op may be more expensive, and if the zext is free, there is no purpose to such a transform.

Really why: I want a combine in our GPU tree that shrinks (and zero extends the result of) large arithmetic operations, because smaller operations take fewer registers and are often faster as well. This will infinite loop if any combines occur on (zext (OP (x)) that result in making OP bigger again.

Repository:
  rL LLVM

https://reviews.llvm.org/D23002

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6309,7 +6309,8 @@
   if ((N0.getOpcode() == ISD::SHL || N0.getOpcode() == ISD::SRL) &&
       isa<ConstantSDNode>(N0.getOperand(1)) &&
       N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND &&
-      N0.hasOneUse()) {
+      N0.hasOneUse() &&
+      !TLI.isZExtFree(N0.getValueType(), VT)) {
     SDValue ShAmt = N0.getOperand(1);
     unsigned ShAmtVal = cast<ConstantSDNode>(ShAmt)->getZExtValue();
     if (N0.getOpcode() == ISD::SHL) {


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