[llvm] r277284 - [HexagonBitSimplify] Remove dead code.

Davide Italiano via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 30 15:07:18 PDT 2016


Author: davide
Date: Sat Jul 30 17:07:18 2016
New Revision: 277284

URL: http://llvm.org/viewvc/llvm-project?rev=277284&view=rev
Log:
[HexagonBitSimplify] Remove dead code.

Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp?rev=277284&r1=277283&r2=277284&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp Sat Jul 30 17:07:18 2016
@@ -1331,7 +1331,6 @@ namespace {
     bool processBlock(MachineBasicBlock &B, const RegisterSet &AVs) override;
     static bool isTfrConst(const MachineInstr &MI);
   private:
-    bool isConst(unsigned R, int64_t &V) const;
     unsigned genTfrConst(const TargetRegisterClass *RC, int64_t C,
         MachineBasicBlock &B, MachineBasicBlock::iterator At, DebugLoc &DL);
 
@@ -1341,23 +1340,6 @@ namespace {
   };
 }
 
-bool ConstGeneration::isConst(unsigned R, int64_t &C) const {
-  if (!BT.has(R))
-    return false;
-  const BitTracker::RegisterCell &RC = BT.lookup(R);
-  int64_t T = 0;
-  for (unsigned i = RC.width(); i > 0; --i) {
-    const BitTracker::BitValue &V = RC[i-1];
-    T <<= 1;
-    if (V.is(1))
-      T |= 1;
-    else if (!V.is(0))
-      return false;
-  }
-  C = T;
-  return true;
-}
-
 bool ConstGeneration::isTfrConst(const MachineInstr &MI) {
   unsigned Opc = MI.getOpcode();
   switch (Opc) {




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