[llvm] r277197 - [ConstantFolding] Handle bitcasts of undef fp vector elements

[David Majnemer via llvm-commits]

Author: majnemer
Date: Fri Jul 29 13:48:27 2016
New Revision: 277197

URL: http://llvm.org/viewvc/llvm-project?rev=277197&view=rev
Log:
[ConstantFolding] Handle bitcasts of undef fp vector elements

We used the wrong type for constructing a zero vector element which led
to type mismatches.

This fixes PR28771.

Modified:
    llvm/trunk/lib/Analysis/ConstantFolding.cpp
    llvm/trunk/test/Transforms/InstCombine/cast.ll

Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=277197&r1=277196&r2=277197&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original)
+++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Fri Jul 29 13:48:27 2016
@@ -187,7 +187,7 @@ Constant *FoldBitCast(Constant *C, Type
       for (unsigned j = 0; j != Ratio; ++j) {
         Constant *Src = C->getAggregateElement(SrcElt++);
         if (Src && isa<UndefValue>(Src))
-          Src = Constant::getNullValue(SrcEltTy);
+          Src = Constant::getNullValue(C->getType()->getVectorElementType());
         else
           Src = dyn_cast_or_null<ConstantInt>(Src);
         if (!Src)  // Reject constantexpr elements.

Modified: llvm/trunk/test/Transforms/InstCombine/cast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast.ll?rev=277197&r1=277196&r2=277197&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/cast.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/cast.ll Fri Jul 29 13:48:27 2016
@@ -1386,3 +1386,10 @@ define i32 @test89() {
 ; CHECK-NEXT:    ret i32 393216
   ret i32 bitcast (<2 x i16> <i16 6, i16 undef> to i32)
 }
+
+define <2 x i32> @test90() {
+; CHECK-LABEL: @test90(
+; CHECK: ret <2 x i32> <i32 0, i32 15360>
+  %tmp6 = bitcast <4 x half> <half undef, half undef, half undef, half 0xH3C00> to <2 x i32>
+  ret <2 x i32> %tmp6
+}