[PATCH] D22889: [X86] Match PSADBW in straight-line code

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

Another few minor thoughts, I'm happy if you'd prefer to just make these all future TODOs.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:26450
@@ +26449,3 @@
+  if (!VT.isSimple() || !(VT.getVectorElementType() == MVT::i32))
+    return SDValue();
+
----------------
Doesn't PSADBW generate unsigned i16 results? IIRC the horizontal sum of absdiff v16i8 / v32i8 / v64i8 should fit into a single i16 correct? Really there's nothing stopping us supporting any result integer type >= 16-bits  no?

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:26461
@@ +26460,3 @@
+    return SDValue();
+
+  // Verify the extract is from index 0.
----------------
mkuper wrote:
> RKSimon wrote:
> > To support wider types is there any way that you can split the vector, perform PSAD on both and then combine the 2 results?
> I think so.
> Right now we don't do this for the loop version either (I didn't write that code originally :-) ), and I kept the same constraint here. I'd prefer to leave it as a TODO, in both places.
OK - a TODO comment is fine.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:26481
@@ +26480,3 @@
+  // <1,u,u,u,u,u,u,u>
+  for (unsigned i = 0; i < Stages; ++i) {
+    if (Op.getOpcode() != ISD::ADD)
----------------
This looks like it could be useful for general matching of reduction/horizontal ops - possibly pull it out? I have in mind detecting any_of/all_of tests for vector comparison results that I'd like to use MOVMSK for instead  - in that case it'd be the same code but we'd match against OR / AND instead of ADD.


https://reviews.llvm.org/D22889