[PATCH] D22838: AMDGPU/SI: Implement amdgcn image intrinsics

[Changpeng Fang via llvm-commits]

cfang updated this revision to Diff 66039.
cfang added a comment.

update the patch based on Matt's comments.

The following comments are not updated:

1. >Not all of these bits should be exposed. GLC, SLC, and TFE definitely should not be. TFE changes the register class of the output. This should strictly be the ones for controlling the sampling
  - I asked this question before I started, and the agreement is to expose all at this moment. We have to study all these flags in detail and get a short list to expose later.

2. >I think you can reduce the number of repeated lines by passing in the suffix, and then concat + cast to the intrinsic (Similar to how MUBUF_LoadIntrinsicPat does it)
  - what's the problem of repeated lines? I think it is more readable than simplified one. Or we can simplify the def in the TableGen cleanup work.

NOTE that Mesa has to be update to accommodate the image_load/image_store intrinsic parameter change.


https://reviews.llvm.org/D22838

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  lib/Target/AMDGPU/SIDefines.h
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SIInstructions.td
  test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.sample-masked.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
  test/CodeGen/AMDGPU/wqm.ll

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