[llvm] r276534 - [X86][SSE] Added more widened broadcast tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 23 14:15:31 PDT 2016
Author: rksimon
Date: Sat Jul 23 16:15:31 2016
New Revision: 276534
URL: http://llvm.org/viewvc/llvm-project?rev=276534&view=rev
Log:
[X86][SSE] Added more widened broadcast tests
Added more vXi16 and vXi8 tests
Modified:
llvm/trunk/test/CodeGen/X86/widened-broadcast.ll
Modified: llvm/trunk/test/CodeGen/X86/widened-broadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widened-broadcast.ll?rev=276534&r1=276533&r2=276534&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widened-broadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widened-broadcast.ll Sat Jul 23 16:15:31 2016
@@ -118,26 +118,112 @@ entry:
ret <8 x i16> %ret
}
-define <16 x i16> @load_splat_16i16_16i16_01010101(<16 x i16>* %ptr) nounwind uwtable readnone ssp {
-; SSE-LABEL: load_splat_16i16_16i16_01010101:
+define <8 x i16> @load_splat_8i16_8i16_01230123(<8 x i16>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_8i16_8i16_01230123:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_8i16_8i16_01230123:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_8i16_8i16_01230123:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_8i16_8i16_01230123:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vpbroadcastq (%rdi), %xmm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <8 x i16>, <8 x i16>* %ptr
+ %ret = shufflevector <8 x i16> %ld, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <8 x i16> %ret
+}
+
+define <16 x i16> @load_splat_16i16_8i16_0101010101010101(<8 x i16>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_16i16_8i16_0101010101010101:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,0,0,0]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_16i16_8i16_0101010101010101:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,0,0,0]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_16i16_8i16_0101010101010101:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vmovaps (%rdi), %xmm0
+; AVX2-NEXT: vbroadcastss %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_16i16_8i16_0101010101010101:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vmovaps (%rdi), %xmm0
+; AVX512-NEXT: vbroadcastss %xmm0, %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <8 x i16>, <8 x i16>* %ptr
+ %ret = shufflevector <8 x i16> %ld, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+ ret <16 x i16> %ret
+}
+
+define <16 x i16> @load_splat_16i16_8i16_0123012301230123(<8 x i16>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_16i16_8i16_0123012301230123:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_16i16_8i16_0123012301230123:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_16i16_8i16_0123012301230123:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vmovaps (%rdi), %xmm0
+; AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_16i16_8i16_0123012301230123:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vmovaps (%rdi), %xmm0
+; AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <8 x i16>, <8 x i16>* %ptr
+ %ret = shufflevector <8 x i16> %ld, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3,i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <16 x i16> %ret
+}
+
+define <16 x i16> @load_splat_16i16_16i16_0101010101010101(<16 x i16>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_16i16_16i16_0101010101010101:
; SSE: # BB#0: # %entry
; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,0,0,0]
; SSE-NEXT: movdqa %xmm0, %xmm1
; SSE-NEXT: retq
;
-; AVX1-LABEL: load_splat_16i16_16i16_01010101:
+; AVX1-LABEL: load_splat_16i16_16i16_0101010101010101:
; AVX1: # BB#0: # %entry
; AVX1-NEXT: vmovaps (%rdi), %ymm0
; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; AVX1-NEXT: retq
;
-; AVX2-LABEL: load_splat_16i16_16i16_01010101:
+; AVX2-LABEL: load_splat_16i16_16i16_0101010101010101:
; AVX2: # BB#0: # %entry
; AVX2-NEXT: vbroadcastss (%rdi), %ymm0
; AVX2-NEXT: retq
;
-; AVX512-LABEL: load_splat_16i16_16i16_01010101:
+; AVX512-LABEL: load_splat_16i16_16i16_0101010101010101:
; AVX512: # BB#0: # %entry
; AVX512-NEXT: vbroadcastss (%rdi), %ymm0
; AVX512-NEXT: retq
@@ -147,3 +233,280 @@ entry:
ret <16 x i16> %ret
}
+define <16 x i16> @load_splat_16i16_16i16_0123012301230123(<16 x i16>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_16i16_16i16_0123012301230123:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_16i16_16i16_0123012301230123:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vbroadcastsd (%rdi), %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_16i16_16i16_0123012301230123:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vmovaps (%rdi), %ymm0
+; AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_16i16_16i16_0123012301230123:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vmovaps (%rdi), %ymm0
+; AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <16 x i16>, <16 x i16>* %ptr
+ %ret = shufflevector <16 x i16> %ld, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3,i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <16 x i16> %ret
+}
+
+define <16 x i8> @load_splat_16i8_16i8_0101010101010101(<16 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_16i8_16i8_0101010101010101:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,0,0,0,4,5,6,7]
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_16i8_16i8_0101010101010101:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = mem[0,0,0,0,4,5,6,7]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_16i8_16i8_0101010101010101:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vpbroadcastw (%rdi), %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_16i8_16i8_0101010101010101:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vpbroadcastw (%rdi), %xmm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <16 x i8>, <16 x i8>* %ptr
+ %ret = shufflevector <16 x i8> %ld, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @load_splat_16i8_16i8_0123012301230123(<16 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_16i8_16i8_0123012301230123:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,0,0,0]
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_16i8_16i8_0123012301230123:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,0,0,0]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_16i8_16i8_0123012301230123:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vbroadcastss (%rdi), %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_16i8_16i8_0123012301230123:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vbroadcastss (%rdi), %xmm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <16 x i8>, <16 x i8>* %ptr
+ %ret = shufflevector <16 x i8> %ld, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @load_splat_16i8_16i8_0123456701234567(<16 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_16i8_16i8_0123456701234567:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_16i8_16i8_0123456701234567:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_16i8_16i8_0123456701234567:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_16i8_16i8_0123456701234567:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vpbroadcastq (%rdi), %xmm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <16 x i8>, <16 x i8>* %ptr
+ %ret = shufflevector <16 x i8> %ld, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @load_splat_32i8_16i8_01010101010101010101010101010101(<16 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_32i8_16i8_01010101010101010101010101010101:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,0,0,0,4,5,6,7]
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_32i8_16i8_01010101010101010101010101010101:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = mem[0,0,0,0,4,5,6,7]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_32i8_16i8_01010101010101010101010101010101:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vmovdqa (%rdi), %xmm0
+; AVX2-NEXT: vpbroadcastw %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_32i8_16i8_01010101010101010101010101010101:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512-NEXT: vpbroadcastw %xmm0, %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <16 x i8>, <16 x i8>* %ptr
+ %ret = shufflevector <16 x i8> %ld, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @load_splat_32i8_16i8_01230123012301230123012301230123(<16 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_32i8_16i8_01230123012301230123012301230123:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,0,0,0]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_32i8_16i8_01230123012301230123012301230123:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,0,0,0]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_32i8_16i8_01230123012301230123012301230123:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vmovaps (%rdi), %xmm0
+; AVX2-NEXT: vbroadcastss %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_32i8_16i8_01230123012301230123012301230123:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vmovaps (%rdi), %xmm0
+; AVX512-NEXT: vbroadcastss %xmm0, %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <16 x i8>, <16 x i8>* %ptr
+ %ret = shufflevector <16 x i8> %ld, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @load_splat_32i8_16i8_01234567012345670123456701234567(<16 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_32i8_16i8_01234567012345670123456701234567:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_32i8_16i8_01234567012345670123456701234567:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_32i8_16i8_01234567012345670123456701234567:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vmovaps (%rdi), %xmm0
+; AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_32i8_16i8_01234567012345670123456701234567:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vmovaps (%rdi), %xmm0
+; AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <16 x i8>, <16 x i8>* %ptr
+ %ret = shufflevector <16 x i8> %ld, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @load_splat_32i8_32i8_01010101010101010101010101010101(<32 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_32i8_32i8_01010101010101010101010101010101:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,0,0,0,4,5,6,7]
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_32i8_32i8_01010101010101010101010101010101:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vmovdqa (%rdi), %ymm0
+; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_32i8_32i8_01010101010101010101010101010101:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vpbroadcastw (%rdi), %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_32i8_32i8_01010101010101010101010101010101:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vpbroadcastw (%rdi), %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <32 x i8>, <32 x i8>* %ptr
+ %ret = shufflevector <32 x i8> %ld, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @load_splat_32i8_32i8_01230123012301230123012301230123(<32 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_32i8_32i8_01230123012301230123012301230123:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,0,0,0]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX1-LABEL: load_splat_32i8_32i8_01230123012301230123012301230123:
+; AVX1: # BB#0: # %entry
+; AVX1-NEXT: vbroadcastss (%rdi), %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_splat_32i8_32i8_01230123012301230123012301230123:
+; AVX2: # BB#0: # %entry
+; AVX2-NEXT: vmovaps (%rdi), %ymm0
+; AVX2-NEXT: vbroadcastss %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: load_splat_32i8_32i8_01230123012301230123012301230123:
+; AVX512: # BB#0: # %entry
+; AVX512-NEXT: vmovaps (%rdi), %ymm0
+; AVX512-NEXT: vbroadcastss %xmm0, %ymm0
+; AVX512-NEXT: retq
+entry:
+ %ld = load <32 x i8>, <32 x i8>* %ptr
+ %ret = shufflevector <32 x i8> %ld, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @load_splat_32i8_32i8_01234567012345670123456701234567(<32 x i8>* %ptr) nounwind uwtable readnone ssp {
+; SSE-LABEL: load_splat_32i8_32i8_01234567012345670123456701234567:
+; SSE: # BB#0: # %entry
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,1,0,1]
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: retq
+;
+; AVX-LABEL: load_splat_32i8_32i8_01234567012345670123456701234567:
+; AVX: # BB#0: # %entry
+; AVX-NEXT: vbroadcastsd (%rdi), %ymm0
+; AVX-NEXT: retq
+entry:
+ %ld = load <32 x i8>, <32 x i8>* %ptr
+ %ret = shufflevector <32 x i8> %ld, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <32 x i8> %ret
+}
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