[llvm] r276348 - [MIRTesting] Abort when failing to parse a function.
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 21 15:25:57 PDT 2016
Author: qcolombet
Date: Thu Jul 21 17:25:57 2016
New Revision: 276348
URL: http://llvm.org/viewvc/llvm-project?rev=276348&view=rev
Log:
[MIRTesting] Abort when failing to parse a function.
When we failed to parse a function in the mir parser, we should abort
the whole compilation instead of continuing in a weird state. Indeed,
this was creating strange machine function passes failures that were
hard to understand, until we notice that the function actually did not
get parsed correctly!
Added:
llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir
llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register-phys.mir
- copied, changed from r276308, llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir
Modified:
llvm/trunk/lib/CodeGen/MachineFunctionAnalysis.cpp
llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir
Modified: llvm/trunk/lib/CodeGen/MachineFunctionAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunctionAnalysis.cpp?rev=276348&r1=276347&r2=276348&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineFunctionAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineFunctionAnalysis.cpp Thu Jul 21 17:25:57 2016
@@ -49,8 +49,10 @@ bool MachineFunctionAnalysis::runOnFunct
assert(!MF && "MachineFunctionAnalysis already initialized!");
MF = new MachineFunction(&F, TM, NextFnNum++,
getAnalysis<MachineModuleInfo>());
- if (MFInitializer)
- MFInitializer->initializeMachineFunction(*MF);
+ if (MFInitializer) {
+ if (MFInitializer->initializeMachineFunction(*MF))
+ report_fatal_error("Unable to initialize machine function");
+ }
return false;
}
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir?rev=276348&r1=276347&r2=276348&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir Thu Jul 21 17:25:57 2016
@@ -1,37 +1,16 @@
-# RUN: not llc -mtriple=aarch64-apple-ios -run-pass none -o - %s 2> %t.log \
-# RUN: | FileCheck %s --check-prefix=CHECK
-# RUN: FileCheck %s -input-file=%t.log --check-prefix=ERR
-# RUN: rm -f %t.log
+# RUN: not llc -mtriple=aarch64-apple-ios -run-pass none -o - %s 2>&1 \
+# RUN: | FileCheck %s --check-prefix=ERR
# REQUIRES: global-isel
# This test ensures that the MIR parser errors out when
# generic virtual register definitions are not correct.
--- |
- define void @bar() { ret void }
-
define void @baz() { ret void }
...
---
-name: bar
-isSSA: true
-# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr }
-registers:
- - { id: 0, class: gpr }
-body: |
- bb.0:
- liveins: %w0
- ; ERR: generic virtual registers must have a size
- ; ERR-NEXT: %0
- %0 = G_ADD i32 %w0, %w0
-...
-
----
name: baz
isSSA: true
-# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: _ }
registers:
- { id: 0, class: _ }
body: |
@@ -39,5 +18,6 @@ body: |
liveins: %w0
; ERR: generic virtual registers must have a size
; ERR-NEXT: %0
+ ; ERR: Unable to initialize machine function
%0 = G_ADD i32 %w0, %w0
...
Added: llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir?rev=276348&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir Thu Jul 21 17:25:57 2016
@@ -0,0 +1,24 @@
+# RUN: not llc -mtriple=aarch64-apple-ios -run-pass none -o - %s 2>&1 \
+# RUN: | FileCheck %s --check-prefix=ERR
+# REQUIRES: global-isel
+# This test ensures that the MIR parser errors out when
+# generic virtual register definitions are not correct.
+# In that case, it is defined by a register bank.
+
+--- |
+ define void @bar() { ret void }
+...
+
+---
+name: bar
+isSSA: true
+registers:
+ - { id: 0, class: gpr }
+body: |
+ bb.0:
+ liveins: %w0
+ ; ERR: generic virtual registers must have a size
+ ; ERR-NEXT: %0
+ ; ERR: Unable to initialize machine function
+ %0 = G_ADD i32 %w0, %w0
+...
Copied: llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register-phys.mir (from r276308, llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register-phys.mir?p2=llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register-phys.mir&p1=llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir&r1=276308&r2=276348&rev=276348&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register-phys.mir Thu Jul 21 17:25:57 2016
@@ -1,18 +1,6 @@
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that an error is reported when a register operand is sized
-# but isn't generic.
-
----
-name: test_size_regclass
-isSSA: true
-registers:
- - { id: 0, class: gr32 }
-body: |
- bb.0.entry:
- liveins: %edi
- ; CHECK: [[@LINE+1]]:8: unexpected size on non-generic virtual register
- %0(32) = G_ADD i32 %edi, %edi
-...
+# but isn't generic, like a physical register.
---
name: test_size_physreg
Modified: llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir?rev=276348&r1=276347&r2=276348&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir Thu Jul 21 17:25:57 2016
@@ -1,6 +1,6 @@
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that an error is reported when a register operand is sized
-# but isn't generic.
+# but isn't generic like a regular virtual register (gr32).
---
name: test_size_regclass
@@ -13,14 +13,3 @@ body: |
; CHECK: [[@LINE+1]]:8: unexpected size on non-generic virtual register
%0(32) = G_ADD i32 %edi, %edi
...
-
----
-name: test_size_physreg
-isSSA: true
-registers:
-body: |
- bb.0.entry:
- liveins: %edi
- ; CHECK: [[@LINE+1]]:10: unexpected size on physical register
- %edi(32) = G_ADD i32 %edi, %edi
-...
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