[PATCH] D22489: AMDGPU/SI: Implement readlane/readfirstlane intrinsics to expose the instructions.

[Changpeng Fang via llvm-commits]

cfang updated this revision to Diff 64711.
cfang added a comment.

Add "m0" testcase based on Matt's request.

TODO:  shoudl fold m0 into the src operand of readlane/readfirstlane. This is at a lower priority and can be done in a separate patch.


https://reviews.llvm.org/D22489

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
  lib/Target/AMDGPU/SIInstructions.td
  lib/Target/AMDGPU/SIRegisterInfo.td
  test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll

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