[lld] r276123 - Initial support for the local dynamic model ARM TLS relocations:
Peter Smith via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 20 07:56:27 PDT 2016
Author: psmith
Date: Wed Jul 20 09:56:26 2016
New Revision: 276123
URL: http://llvm.org/viewvc/llvm-project?rev=276123&view=rev
Log:
Initial support for the local dynamic model ARM TLS relocations:
- R_ARM_TLS_LDM32
- R_ARM_TLS_LDO32
The local dynamic implementation and tests follows the same model as
the other ARM TLS models. The R_ARM_TLS_LDO32 is implemented as R_ABS
expr type as the getVA() for a TLS symbol will return the offset from the
start of the TLS block.
Differential Revision https://reviews.llvm.org/D22563
Added:
lld/trunk/test/ELF/arm-tls-ldm32.s (with props)
Modified:
lld/trunk/ELF/Target.cpp
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=276123&r1=276122&r2=276123&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Wed Jul 20 09:56:26 2016
@@ -178,6 +178,7 @@ public:
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
uint32_t getDynRel(uint32_t Type) const override;
uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+ bool isTlsLocalDynamicRel(uint32_t Type) const override;
bool isTlsGlobalDynamicRel(uint32_t Type) const override;
bool isTlsInitialExecRel(uint32_t Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
@@ -1523,6 +1524,8 @@ RelExpr ARMTargetInfo::getRelExpr(uint32
return R_GOT_PC;
case R_ARM_TLS_GD32:
return R_TLSGD_PC;
+ case R_ARM_TLS_LDM32:
+ return R_TLSLD_PC;
case R_ARM_BASE_PREL:
// B(S) + A - P
// FIXME: currently B(S) assumed to be .got, this may not hold for all
@@ -1624,6 +1627,8 @@ void ARMTargetInfo::relocateOne(uint8_t
case R_ARM_REL32:
case R_ARM_TLS_GD32:
case R_ARM_TLS_IE32:
+ case R_ARM_TLS_LDM32:
+ case R_ARM_TLS_LDO32:
case R_ARM_TLS_LE32:
write32le(Loc, Val);
break;
@@ -1749,6 +1754,8 @@ uint64_t ARMTargetInfo::getImplicitAdden
case R_ARM_GOT_PREL:
case R_ARM_REL32:
case R_ARM_TLS_GD32:
+ case R_ARM_TLS_LDM32:
+ case R_ARM_TLS_LDO32:
case R_ARM_TLS_IE32:
case R_ARM_TLS_LE32:
return SignExtend64<32>(read32le(Buf));
@@ -1808,6 +1815,10 @@ uint64_t ARMTargetInfo::getImplicitAdden
}
}
+bool ARMTargetInfo::isTlsLocalDynamicRel(uint32_t Type) const {
+ return Type == R_ARM_TLS_LDO32 || Type == R_ARM_TLS_LDM32;
+}
+
bool ARMTargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const {
return Type == R_ARM_TLS_GD32;
}
Added: lld/trunk/test/ELF/arm-tls-ldm32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-ldm32.s?rev=276123&view=auto
==============================================================================
--- lld/trunk/test/ELF/arm-tls-ldm32.s (added)
+++ lld/trunk/test/ELF/arm-tls-ldm32.s Wed Jul 20 09:56:26 2016
@@ -0,0 +1,73 @@
+// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
+// RUN: ld.lld %t.o -o %t.so -shared
+// RUN: llvm-readobj -s -dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
+// RUN: llvm-objdump -d -triple=armv7a-linux-gnueabi %t.so | FileCheck %s
+// REQUIRES: arm
+
+// Test the handling of the local-dynamic TLS model. Dynamic loader finds
+// module index R_ARM_TLS_DTPMOD32. The offset in the next GOT slot is 0
+// The R_ARM_TLS_LDO is the offset of the variable within the TLS block.
+ .global __tls_get_addr
+ .text
+ .p2align 2
+ .global _start
+ .syntax unified
+ .arm
+ .type _start, %function
+_start:
+.L0:
+ nop
+
+ .word x(tlsldm) + (. - .L0 - 8)
+ .word x(tlsldo)
+ .word y(tlsldo)
+
+ .section .tbss,"awT",%nobits
+ .p2align 2
+ .type y, %object
+y:
+ .space 4
+ .section .tdata,"awT",%progbits
+ .p2align 2
+ .type x, %object
+x:
+ .word 10
+
+// SEC: Name: .tdata
+// SEC-NEXT: Type: SHT_PROGBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT: SHF_ALLOC
+// SEC-NEXT: SHF_TLS
+// SEC-NEXT: SHF_WRITE
+// SEC-NEXT: ]
+// SEC-NEXT: Address: 0x2000
+// SEC: Size: 4
+// SEC: Name: .tbss
+// SEC-NEXT: Type: SHT_NOBITS (0x8)
+// SEC-NEXT: Flags [
+// SEC-NEXT: SHF_ALLOC
+// SEC-NEXT: SHF_TLS
+// SEC-NEXT: SHF_WRITE
+// SEC-NEXT: ]
+// SEC-NEXT: Address: 0x2004
+// SEC: Size: 4
+
+// SEC: Dynamic Relocations {
+// SEC-NEXT: 0x204C R_ARM_TLS_DTPMOD32 - 0x0
+
+// CHECK: Disassembly of section .text:
+// CHECK-NEXT: _start:
+// CHECK-NEXT: 1000: 00 f0 20 e3 nop
+
+// (0x204c - 0x1004) + (0x1004 - 0x1000 - 8) = 0x1044
+// CHECK: 1004: 44 10 00 00
+// CHECK-NEXT: 1008: 00 00 00 00
+// CHECK-NEXT: 100c: 04 00 00 00
+
+// CHECK-EXE: Disassembly of section .text:
+// CHECK-NEXT-EXE: _start:
+// CHECK-NEXT-EXE: 11000: 00 f0 20 e3 nop
+
+// CHECK-EXE: 11004: fc 0f 00 00
+// CHECK-EXE: 11008: 00 00 00 00
+// CHECK-EXE: 1100c: 04 00 00 00
Propchange: lld/trunk/test/ELF/arm-tls-ldm32.s
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Propchange: lld/trunk/test/ELF/arm-tls-ldm32.s
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svn:keywords = Rev Date Author URL Id
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