[llvm] r275889 - Revert "[ARM] Update test to use CHECK-LABEL. NFCI."
Robinson, Paul via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 18 13:16:48 PDT 2016
> -----Original Message-----
> From: llvm-commits [mailto:llvm-commits-bounces at lists.llvm.org] On Behalf
> Of Vitaly Buka via llvm-commits
> Sent: Monday, July 18, 2016 12:44 PM
> To: llvm-commits at lists.llvm.org
> Subject: [llvm] r275889 - Revert "[ARM] Update test to use CHECK-LABEL.
> NFCI."
>
> Author: vitalybuka
> Date: Mon Jul 18 14:43:58 2016
> New Revision: 275889
>
> URL: http://llvm.org/viewvc/llvm-project?rev=275889&view=rev
> Log:
> Revert "[ARM] Update test to use CHECK-LABEL. NFCI."
>
> Breaks asan, see https://reviews.llvm.org/D22103
>
> This reverts commit r275777.
>
> Modified:
> llvm/trunk/test/CodeGen/ARM/inlineasm3.ll
>
> Modified: llvm/trunk/test/CodeGen/ARM/inlineasm3.ll
> URL: http://llvm.org/viewvc/llvm-
> project/llvm/trunk/test/CodeGen/ARM/inlineasm3.ll?rev=275889&r1=275888&r2=
> 275889&view=diff
> ==========================================================================
> ====
> --- llvm/trunk/test/CodeGen/ARM/inlineasm3.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/inlineasm3.ll Mon Jul 18 14:43:58 2016
> @@ -6,7 +6,6 @@
>
> define void @t() nounwind {
> entry:
> -; CHECK-LABEL: t
This would match the first occurrence of the letter 't'
in the output. It probably should have been
; CHECK-LABEL: t:
and similarly for the other CHECK-LABEL directives.
> ; CHECK: vmov.I64 q15, #0
> ; CHECK: vmov.32 d30[0],
> ; CHECK: vmov q8, q15
> @@ -20,7 +19,6 @@ entry:
>
> define void @t2() nounwind {
> entry:
> -; CHECK-LABEL: t2
> ; CHECK: vmov d30, d16
> ; CHECK: vmov.32 r0, d30[0]
> %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0,
> d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind
> @@ -66,7 +64,7 @@ ret i32 0
>
> define float @t6(float %y) nounwind {
> entry:
> -; CHECK-LABEL: t6
> +; CHECK: t6
> ; CHECK: flds s15, s0
> %0 = tail call float asm "flds s15, $0", "=x"() nounwind
> ret float %0
> @@ -76,7 +74,7 @@ entry:
>
> define double @t7(double %y) nounwind {
> entry:
> -; CHECK-LABEL: t7
> +; CHECK: t7
> ; CHECK: flds s15, d0
> %0 = tail call double asm "flds s15, $0", "=x"() nounwind
> ret double %0
> @@ -86,7 +84,7 @@ entry:
>
> define float @t8(float %y) nounwind {
> entry:
> -; CHECK-LABEL: t8
> +; CHECK: t8
> ; CHECK: flds s15, s0
> %0 = tail call float asm "flds s15, $0", "=t"() nounwind
> ret float %0
> @@ -96,7 +94,7 @@ entry:
>
> define i32 @t9(i32 %r0) nounwind {
> entry:
> -; CHECK-LABEL: t9
> +; CHECK: t9
> ; CHECK: movw r0, #27182
> %0 = tail call i32 asm "movw $0, $1", "=r,j"(i32 27182) nounwind
> ret i32 %0
> @@ -106,7 +104,7 @@ entry:
>
> define void @t10(i8* %f, i32 %g) nounwind {
> entry:
> -; CHECK-LABEL: t10
> +; CHECK: t10
> ; CHECK: str r1, [r0]
> %f.addr = alloca i8*, align 4
> store i8* %f, i8** %f.addr, align 4
> @@ -118,7 +116,7 @@ entry:
>
> define <4 x i32> @t11(i32* %p) nounwind {
> entry:
> -; CHECK-LABEL: t11
> +; CHECK: t11
> ; CHECK: vld1.s32 {d16[], d17[]}, [r0]
> %0 = tail call <4 x i32> asm "vld1.s32 {${0:e}[], ${0:f}[]}, [$1]",
> "=w,r"(i32* %p) nounwind
> ret <4 x i32> %0
>
>
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