[llvm] r275770 - [X86] Add VPMULLW/D/Q instructions to X86InstrInfo::isAssociativeAndCommutative.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Jul 18 01:14:57 2016
New Revision: 275770

URL: http://llvm.org/viewvc/llvm-project?rev=275770&view=rev
Log:
[X86] Add VPMULLW/D/Q instructions to X86InstrInfo::isAssociativeAndCommutative.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=275770&r1=275769&r2=275770&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Jul 18 01:14:57 2016
@@ -7727,6 +7727,19 @@ bool X86InstrInfo::isAssociativeAndCommu
   case X86::VPADDWZrr:
   case X86::VPADDDZrr:
   case X86::VPADDQZrr:
+  case X86::VPMULLWrr:
+  case X86::VPMULLWYrr:
+  case X86::VPMULLWZ128rr:
+  case X86::VPMULLWZ256rr:
+  case X86::VPMULLWZrr:
+  case X86::VPMULLDrr:
+  case X86::VPMULLDYrr:
+  case X86::VPMULLDZ128rr:
+  case X86::VPMULLDZ256rr:
+  case X86::VPMULLDZrr:
+  case X86::VPMULLQZ128rr:
+  case X86::VPMULLQZ256rr:
+  case X86::VPMULLQZrr:
   // Normal min/max instructions are not commutative because of NaN and signed
   // zero semantics, but these are. Thus, there's no need to check for global
   // relaxed math; the instructions themselves have the properties we need.