[PATCH] D22432: llc: Add support for -run-pass none

Duncan P. N. Exon Smith via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 15 18:47:10 PDT 2016 

> On 2016-Jul-15, at 18:43, Matthias Braun <matze at braunis.de> wrote:
> 
> MatzeB created this revision.
> MatzeB added reviewers: qcolombet, dexonsmith.
> MatzeB added a subscriber: llvm-commits.
> MatzeB set the repository for this revision to rL LLVM.
> Herald added a reviewer: tstellarAMD.
> Herald added subscribers: nemanjai, mcrosier, dsanders, qcolombet, jholewinski.
> 
> This does not schedule any passes besides the ones necessary to
> construct and print the machine function. This is useful to test .mir
> file parsing and printing.
> 
> Repository:
>  rL LLVM
> 
> https://reviews.llvm.org/D22432
> 
> Files:
>  test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
>  test/CodeGen/MIR/AArch64/expected-target-flag-name.mir
>  test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
>  test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir
>  test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
>  test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
>  test/CodeGen/MIR/AArch64/target-flags.mir
>  test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
>  test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
>  test/CodeGen/MIR/AMDGPU/target-index-operands.mir
>  test/CodeGen/MIR/ARM/bundled-instructions.mir
>  test/CodeGen/MIR/ARM/cfi-same-value.mir
>  test/CodeGen/MIR/ARM/expected-closing-brace.mir
>  test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir
>  test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir
>  test/CodeGen/MIR/Generic/basic-blocks.mir
>  test/CodeGen/MIR/Generic/expected-colon-after-basic-block.mir
>  test/CodeGen/MIR/Generic/expected-mbb-reference-for-successor-mbb.mir
>  test/CodeGen/MIR/Generic/frame-info.mir
>  test/CodeGen/MIR/Generic/function-missing-machine-function.mir
>  test/CodeGen/MIR/Generic/invalid-jump-table-kind.mir
>  test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir
>  test/CodeGen/MIR/Generic/llvmIR.mir
>  test/CodeGen/MIR/Generic/llvmIRMissing.mir
>  test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
>  test/CodeGen/MIR/Generic/machine-basic-block-redefinition-error.mir
>  test/CodeGen/MIR/Generic/machine-basic-block-undefined-ir-block.mir
>  test/CodeGen/MIR/Generic/machine-basic-block-unknown-name.mir
>  test/CodeGen/MIR/Generic/machine-function-missing-body-error.mir
>  test/CodeGen/MIR/Generic/machine-function-missing-function.mir
>  test/CodeGen/MIR/Generic/machine-function-missing-name.mir
>  test/CodeGen/MIR/Generic/machine-function-redefinition-error.mir
>  test/CodeGen/MIR/Generic/machine-function.mir
>  test/CodeGen/MIR/Generic/register-info.mir
>  test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir
>  test/CodeGen/MIR/Mips/memory-operands.mir
>  test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
>  test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
>  test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
>  test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
>  test/CodeGen/MIR/X86/basic-block-liveins.mir
>  test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir
>  test/CodeGen/MIR/X86/block-address-operands.mir
>  test/CodeGen/MIR/X86/callee-saved-info.mir
>  test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
>  test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
>  test/CodeGen/MIR/X86/cfi-offset.mir
>  test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir
>  test/CodeGen/MIR/X86/constant-pool.mir
>  test/CodeGen/MIR/X86/constant-value-error.mir
>  test/CodeGen/MIR/X86/dead-register-flag.mir
>  test/CodeGen/MIR/X86/def-register-already-tied-error.mir
>  test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir
>  test/CodeGen/MIR/X86/duplicate-register-flag-error.mir
>  test/CodeGen/MIR/X86/early-clobber-register-flag.mir
>  test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
>  test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
>  test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir
>  test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
>  test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
>  test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir
>  test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
>  test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
>  test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
>  test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
>  test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir
>  test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir
>  test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir
>  test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir
>  test/CodeGen/MIR/X86/expected-machine-operand.mir
>  test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir
>  test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir
>  test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
>  test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
>  test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
>  test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir
>  test/CodeGen/MIR/X86/expected-named-register-livein.mir
>  test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir
>  test/CodeGen/MIR/X86/expected-number-after-bb.mir
>  test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
>  test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir
>  test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir
>  test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
>  test/CodeGen/MIR/X86/expected-register-after-flags.mir
>  test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir
>  test/CodeGen/MIR/X86/expected-stack-object.mir
>  test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
>  test/CodeGen/MIR/X86/expected-target-flag-name.mir
>  test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir
>  test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir
>  test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir
>  test/CodeGen/MIR/X86/external-symbol-operands.mir
>  test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
>  test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
>  test/CodeGen/MIR/X86/fixed-stack-objects.mir
>  test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
>  test/CodeGen/MIR/X86/frame-info-stack-references.mir
>  test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
>  test/CodeGen/MIR/X86/function-liveins.mir
>  test/CodeGen/MIR/X86/generic-instr-type-error.mir
>  test/CodeGen/MIR/X86/generic-virtual-registers.mir
>  test/CodeGen/MIR/X86/global-value-operands.mir
>  test/CodeGen/MIR/X86/immediate-operands.mir
>  test/CodeGen/MIR/X86/implicit-register-flag.mir
>  test/CodeGen/MIR/X86/inline-asm-registers.mir
>  test/CodeGen/MIR/X86/instructions-debug-location.mir
>  test/CodeGen/MIR/X86/invalid-constant-pool-item.mir
>  test/CodeGen/MIR/X86/invalid-metadata-node-type.mir
>  test/CodeGen/MIR/X86/invalid-target-flag-name.mir
>  test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir
>  test/CodeGen/MIR/X86/jump-table-info.mir
>  test/CodeGen/MIR/X86/jump-table-redefinition-error.mir
>  test/CodeGen/MIR/X86/killed-register-flag.mir
>  test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
>  test/CodeGen/MIR/X86/large-immediate-operand-error.mir
>  test/CodeGen/MIR/X86/large-index-number-error.mir
>  test/CodeGen/MIR/X86/large-offset-number-error.mir
>  test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir
>  test/CodeGen/MIR/X86/liveout-register-mask.mir
>  test/CodeGen/MIR/X86/machine-basic-block-operands.mir
>  test/CodeGen/MIR/X86/machine-instructions.mir
>  test/CodeGen/MIR/X86/machine-verifier.mir
>  test/CodeGen/MIR/X86/memory-operands.mir
>  test/CodeGen/MIR/X86/metadata-operands.mir
>  test/CodeGen/MIR/X86/missing-closing-quote.mir
>  test/CodeGen/MIR/X86/missing-comma.mir
>  test/CodeGen/MIR/X86/missing-implicit-operand.mir
>  test/CodeGen/MIR/X86/named-registers.mir
>  test/CodeGen/MIR/X86/newline-handling.mir
>  test/CodeGen/MIR/X86/null-register-operands.mir
>  test/CodeGen/MIR/X86/register-mask-operands.mir
>  test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
>  test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
>  test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir
>  test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir
>  test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
>  test/CodeGen/MIR/X86/stack-object-debug-info.mir
>  test/CodeGen/MIR/X86/stack-object-invalid-name.mir
>  test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir
>  test/CodeGen/MIR/X86/stack-object-operands.mir
>  test/CodeGen/MIR/X86/stack-object-redefinition-error.mir
>  test/CodeGen/MIR/X86/stack-objects.mir
>  test/CodeGen/MIR/X86/standalone-register-error.mir
>  test/CodeGen/MIR/X86/subreg-on-physreg.mir
>  test/CodeGen/MIR/X86/subregister-index-operands.mir
>  test/CodeGen/MIR/X86/subregister-operands.mir
>  test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
>  test/CodeGen/MIR/X86/successor-basic-blocks.mir
>  test/CodeGen/MIR/X86/tied-def-operand-invalid.mir
>  test/CodeGen/MIR/X86/undef-register-flag.mir
>  test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir
>  test/CodeGen/MIR/X86/undefined-global-value.mir
>  test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir
>  test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir
>  test/CodeGen/MIR/X86/undefined-jump-table-id.mir
>  test/CodeGen/MIR/X86/undefined-named-global-value.mir
>  test/CodeGen/MIR/X86/undefined-register-class.mir
>  test/CodeGen/MIR/X86/undefined-stack-object.mir
>  test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir
>  test/CodeGen/MIR/X86/undefined-virtual-register.mir
>  test/CodeGen/MIR/X86/unknown-instruction.mir
>  test/CodeGen/MIR/X86/unknown-machine-basic-block.mir
>  test/CodeGen/MIR/X86/unknown-metadata-keyword.mir
>  test/CodeGen/MIR/X86/unknown-metadata-node.mir
>  test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir
>  test/CodeGen/MIR/X86/unknown-register.mir
>  test/CodeGen/MIR/X86/unknown-subregister-index-op.mir
>  test/CodeGen/MIR/X86/unknown-subregister-index.mir
>  test/CodeGen/MIR/X86/unrecognized-character.mir
>  test/CodeGen/MIR/X86/used-physical-register-info.mir
>  test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir
>  test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
>  test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir
>  test/CodeGen/MIR/X86/virtual-registers.mir
>  tools/llc/llc.cpp
> 
> <D22432.64218.patch>


> Index: tools/llc/llc.cpp
> ===================================================================
> --- tools/llc/llc.cpp
> +++ tools/llc/llc.cpp
> @@ -267,6 +267,34 @@
>    return 0;
>  }
>  
> +static bool addPass(PassManagerBase &PM, const char *argv0,
> +                    StringRef PassName, TargetPassConfig &TPC) {

It would be nice to split out this helper function as a NFC prep commit.

> +  if (PassName == "none")
> +    return false;

Then just add these two lines (and all the testcase changes) as a second step.

Otherwise, LGTM.

> +
> +  const PassRegistry *PR = PassRegistry::getPassRegistry();
> +  const PassInfo *PI = PR->getPassInfo(PassName);
> +  if (!PI) {
> +    errs() << argv0 << ": run-pass " << PassName << " is not registered.\n";
> +    return true;
> +  }
> +
> +  Pass *P;
> +  if (PI->getTargetMachineCtor())
> +    P = PI->getTargetMachineCtor()(&TPC.getTM<TargetMachine>());
> +  else if (PI->getNormalCtor())
> +    P = PI->getNormalCtor()();
> +  else {
> +    errs() << argv0 << ": cannot create pass: " << PI->getPassName() << "\n";
> +    return true;
> +  }
> +  std::string Banner = std::string("After ") + std::string(P->getPassName());
> +  PM.add(P);
> +  TPC.printAndVerify(Banner);
> +
> +  return false;
> +}
> +
>  static int compileModule(char **argv, LLVMContext &Context) {
>    // Load the module to be compiled...
>    SMDiagnostic Err;

More information about the llvm-commits mailing list