[llvm] r275508 - AMDGPU: Fix splitting kill blocks with defs before kill
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 14 17:58:10 PDT 2016
Author: arsenm
Date: Thu Jul 14 19:58:09 2016
New Revision: 275508
URL: http://llvm.org/viewvc/llvm-project?rev=275508&view=rev
Log:
AMDGPU: Fix splitting kill blocks with defs before kill
Modified:
llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/trunk/test/CodeGen/AMDGPU/skip-if-dead.ll
Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=275508&r1=275507&r2=275508&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Thu Jul 14 19:58:09 2016
@@ -1091,12 +1091,6 @@ MachineBasicBlock *SITargetLowering::spl
MachineBasicBlock *SplitBB
= MF->CreateMachineBasicBlock(BB->getBasicBlock());
- SmallSet<unsigned, 8> SplitDefRegs;
- for (auto I = SplitPoint, E = BB->end(); I != E; ++I) {
- for (MachineOperand &Def : I->defs())
- SplitDefRegs.insert(Def.getReg());
- }
-
// Fix the block phi references to point to the new block for the defs in the
// second piece of the block.
for (MachineBasicBlock *Succ : BB->successors()) {
@@ -1104,13 +1098,10 @@ MachineBasicBlock *SITargetLowering::spl
if (!MI.isPHI())
break;
- for (unsigned I = 1, E = MI.getNumOperands(); I != E; I += 2) {
- unsigned IncomingReg = MI.getOperand(I).getReg();
- MachineOperand &FromBB = MI.getOperand(I + 1);
+ for (unsigned I = 2, E = MI.getNumOperands(); I != E; I += 2) {
+ MachineOperand &FromBB = MI.getOperand(I);
if (BB == FromBB.getMBB()) {
- if (SplitDefRegs.count(IncomingReg))
- FromBB.setMBB(SplitBB);
-
+ FromBB.setMBB(SplitBB);
break;
}
}
@@ -1120,7 +1111,6 @@ MachineBasicBlock *SITargetLowering::spl
MF->insert(++MachineFunction::iterator(BB), SplitBB);
SplitBB->splice(SplitBB->begin(), BB, SplitPoint, BB->end());
-
SplitBB->transferSuccessors(BB);
BB->addSuccessor(SplitBB);
Modified: llvm/trunk/test/CodeGen/AMDGPU/skip-if-dead.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/skip-if-dead.ll?rev=275508&r1=275507&r2=275508&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/skip-if-dead.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/skip-if-dead.ll Thu Jul 14 19:58:09 2016
@@ -249,6 +249,54 @@ exit:
ret void
}
+; bug 28550
+; CHECK-LABEL: {{^}}phi_use_def_before_kill:
+; CHECK: v_cndmask_b32_e64 [[PHIREG:v[0-9]+]], 0, -1.0,
+; CHECK: v_cmpx_le_f32_e32 vcc, 0,
+; CHECK-NEXT: s_cbranch_execnz [[BB4:BB[0-9]+_[0-9]+]]
+
+; CHECK: exp
+; CHECK-NEXT: s_endpgm
+
+; CHECK: [[KILLBB:BB[0-9]+_[0-9]+]]:
+; CHECK: s_and_b64 vcc, exec,
+; CHECK-NEXT: s_cbranch_vccz [[PHIBB:BB[0-9]+_[0-9]+]]
+
+; CHECK: [[PHIBB]]:
+; CHECK: v_cmp_eq_f32_e32 vcc, 0, [[PHIREG]]
+; CHECK: s_and_b64 vcc, exec, vcc
+; CHECK: s_cbranch_vccz [[ENDBB:BB[0-9]+_[0-9]+]]
+
+; CHECK: ; BB#3: ; %bb10
+; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 9
+; CHECK: buffer_store_dword
+
+; CHECK: [[ENDBB]]:
+; CHECK-NEXT: s_endpgm
+define amdgpu_ps void @phi_use_def_before_kill() #0 {
+bb:
+ %tmp = fadd float undef, 1.000000e+00
+ %tmp1 = fcmp olt float 0.000000e+00, %tmp
+ %tmp2 = select i1 %tmp1, float -1.000000e+00, float 0.000000e+00
+ call void @llvm.AMDGPU.kill(float %tmp2)
+ br i1 undef, label %phibb, label %bb8
+
+phibb:
+ %tmp5 = phi float [ %tmp2, %bb ], [ 4.0, %bb8 ]
+ %tmp6 = fcmp oeq float %tmp5, 0.000000e+00
+ br i1 %tmp6, label %bb10, label %end
+
+bb8:
+ store volatile i32 8, i32 addrspace(1)* undef
+ br label %phibb
+
+bb10:
+ store volatile i32 9, i32 addrspace(1)* undef
+ br label %end
+
+end:
+ ret void
+}
declare void @llvm.AMDGPU.kill(float) #0
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